A software-in-the-loop (SIL) simulation compiles generated source code and executes the code as a separate process on your host computer. By comparing normal and SIL simulation results, you can test the numerical equivalence of your model and the generated code. During a SIL simulation, you can collect code coverage and execution-time metrics for the generated code.
|SIL/PIL Manager||Verify generated code (Since R2019b)|
- SIL and PIL Simulations
An overview of software-in-the-loop (SIL) and processor-in-the-loop simulations (PIL).
- Choose a SIL or PIL Approach
Test code generated from top models, referenced models, or subsystems.
- Configure and Run SIL Simulation
Set up and run top-model SIL, Model block SIL, and SIL block simulations.
- Unit Test Subsystem Code with SIL/PIL Manager
Perform unit testing on atomic subsystem by using SIL/PIL Manager.
- SIL/PIL Manager Verification Workflow
A simplified workflow for verifying generated code.
- Simulation Mode Override Behavior in Model Reference Hierarchy
How the simulation mode of the top model or parent model determines the simulation behavior of a model hierarchy.
- SIL and PIL Limitations
Modeling and code generation features that are not supported or partially supported by SIL and PIL simulations.
Use a debugger to understand the behavior of generated code.
Produce a code generation report and static code metrics that cover SIL and PIL files.
Determine whether model and generated code simulation results are numerically consistent. Investigate discrepancies.