Untimed SystemC/TLM Simulation
This example highlights the use of the 'Untimed' timing mode when you generate a SystemC™/TLM component from a Simulink® model using the tlmgenerator target for either Simulink® Coder™ or Embedded Coder®.
In Simulink® models, the movement of data between sources and sinks is controlled by signal sample rates and a centralized timing solver. In SystemC/TLM models, interactions between data sinks and sources are controlled by the SystemC simulation kernel and time advances through SC_THREADs cooperatively yielding control to another thread through
For untimed SystemC/TLM simulations, the model ignores annotated delays for communication interfaces and processing. In such models, the goal is only to have a simulation that yields correct results by ensuring that initiators and targets can successfully synchronize the movement of data. There is no attempt to evaluate the performance of a deployed system. No simulation time should elapse while in an untimed simulation because the synchronization is completely event based.
For this example we use a Simulink model of a FIR filter as the basis of the SystemC/TLM generation.
Products required to run this demo:
SystemC 2.3.1 (includes the TLM library)
For code verification, make and a compatible GNU-compiler, gcc, in your path on Linux®, or Visual Studio® compiler in your path on Windows®
Note: The example includes a code generation build procedure. Simulink does not permit you to build programs in the MATLAB installation area. If necessary, change to a working directory that is not in the MATLAB installation area prior to starting any build.
1. Open the Preconfigured Model
To open the TLM untimed testbench model, click the Open Model button.
The following model opens in Simulink.
2. Review the TLM Generator Target Configuration Options
In the Simulink Toolstrip, select Model Settings from the Modeling tab. In the Configuration Parameters dialog box, select the TLM Generator view and the tab TLM Testbench and review the testbench settings as shown in the following image. Select the verbose testbench message checkbox to see the full log of initiator/target interaction in the SystemC/TLM simulation. Since this will be thousands of lines, if desired, deselect the option to get a terse log of the SystemC/TLM simulation.
3. Build the Model
In the model window, right-click on the DualFilter block and select C/C++ Code > Generate Code for this Subsystem in the context menu to start the TLM component and testbench generation. Or you can execute the following command in the MATLAB command window:
The generation is completed when the following message appears in the MATLAB command window:
### Starting Simulink Coder build procedure for model: DualFilter ### Successful completion of Simulink Coder build procedure for model: DualFilter Build Summary Top model targets built: Model Action Rebuild Reason =============================================================================== DualFilter Code generated. Code generation information file does not exist. 1 of 1 models built (0 models already up to date) Build duration: 0h 0m 10.625s
4. Open the Generated Files
Open the generated testbench source code in the MATLAB web browser by clicking on 'DualFilter_uttb_tlm_tb.cpp' in the generated report or in the MATLAB Editor:
5. Review the Generated Code
The specification of 'Without timing' results in the testbench instructing the TLM component to run in untimed mode by means of a special configuration interface,
mw_backdoorcfg_IF. As the code indicates, the choice of timing mode is dynamic and can be changed during the course of simulation. Since this choice is purely a simulation construct, it is not programmed by means of a "front-door" TLM transaction.
Additionally, as the code indicates, the testbench must setup a local helper object with the correct timing mode in order to ensure that its initiator threads use the proper synchronization in the TLM transaction calls.
The implementation of the untimed synchronization class,
mw_syncuntimed_tb, in the
mw_support_tb.cpp file shows the details of the various synchronization calls used by the initiator threads and the TLM transactions. As previously stated, the calls utilize waits of SC_ZERO_TIME and no delays are allowed to accumulate.
6. Verify the Generated Code
Configuration Parameters dialog box, go in
TLM Testbench configuration parameter dialog and push the
Verify TLM Component button to run the generated testbench in the untimed timing mode or in the MATLAB command window execute:
This action will:
build the generated code
run Simulink to capture input stimulus and expected results
convert the Simulink data to TLM vectors
run the stand-alone SystemC/TLM testbench executable
convert the TLM results back to Simulink data
perform a data comparison
generate a Figure window for any signals that had data mis-compares