Determine whether array is empty



TF = isempty(A) returns logical 1 (true) if A is empty, and logical 0 (false) otherwise. An empty array, table, or timetable has at least one dimension with length 0, such as 0-by-0 or 0-by-5.


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Create a 3-D array with one dimension length equal to zero, and determine if it is empty.

A = zeros(0,2,2);
TF = isempty(A)
TF = logical

Compare empty arrays to arrays containing missing values.

In MATLAB®, an empty array has at least one dimension length equal to zero. An array containing missing values, such as NaN or <undefined>, is not necessarily empty.

Create a categorical vector with missing values.

cat1 = categorical([missing missing])
cat1 = 1x2 categorical
     <undefined>      <undefined> 

Since cat1 does not have a dimension of length zero, it is not empty.

TF1 = isempty(cat1)
TF1 = logical

Create a 0-by-0 categorical array and test if it is empty.

cat2 = categorical([]);
TF2 = isempty(cat2)
TF2 = logical

Compare empty string arrays and strings with no characters.

Create a string vector whose elements are strings with no characters. str1 is nonempty since none of its dimensions have length zero.

str1 = strings(1,3)
str1 = 1x3 string
    ""    ""    ""

TF1 = isempty(str1)
TF1 = logical

Create a 0-by-3 string array and test if it is empty.

str2 = strings(0,3);
TF2 = isempty(str2)
TF2 = logical

Input Arguments

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Input array or table, specified as a scalar, vector, matrix, multidimensional array, table, or timetable.


  • To determine whether a string array has empty strings (string elements with zero characters), use the == operator. For example, if str is a string containing zero characters, then str == "" returns logical 1 (true). For more information on testing empty strings, see Test for Empty Strings and Missing Values. For information on string comparison, see Compare Text.

  • To test for missing values in an array, use the ismissing function.

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using MATLAB® Coder™.

HDL Code Generation
Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.

See Also


Introduced before R2006a