HDL Code Generation
Implement a Simulink® model or subsystem in hardware by generating HDL code and deploying that code on an Application-Specific Integrated Circuit (ASIC) or Field Programmable Gate Array (FPGA). These examples show how to generate HDL code from Simulink models. For more information on HDL code generation from Simulink models, see HDL Code Generation from Simulink (HDL Coder).
This tutorial is the first of a two-part series that will guide you through how to develop a beamformer in Simulink® suitable for implementation on hardware, such as a Field Programmable Gate Array (FPGA).
This tutorial is the second of a two-part series that will guide you through the steps to generate HDL code for a beamforming algorithm and verify that the generated code is functionally correct.