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Memory Transactions

Create shared memory system in SoC model

SoC Blockset™ enables simulation and evaluation of shared memory transactions in Simulink®. To include a memory system in your SoC model, configure a memory controller for the desired number of memory channels, and then connect the controller to memory channel blocks for arbitrating and handling memory traffic.

Blocks

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Memory ChannelStream data through a memory channel
Memory ControllerArbitrate memory transactions for one or more Memory Channel blocks
Memory Traffic GeneratorGenerate traffic towards memory controller
Register ChannelTiming model for transfer of register values
SoC Bus SelectorConvert bus to control signals
SoC Bus Creator Convert control signals to bus
Stream FIFOControl backpressure between hardware logic and upstream data interface
Video Stream FIFOControl backpressure between hardware logic and upstream video interface
Stream ConnectorConnect two IPs with data streaming interfaces
Video Stream ConnectorConnect two IPs with video streaming interfaces

Simulink Configuration Parameters

Topics

Memory and Register Data Transfers

Introduction to memory and register transfers

External Memory Channel Protocols

Supported memory channel protocols and control signals

AXI4-Stream Interface

How to design your model for AXI4-Stream vector or scalar interface generation

Simplified AXI4 Master Interface

Description of AXI4 Master protocol, and how you can design your model for IP core generation with AXI4-Master interfaces.

AXI4-Stream Video Interface

How to design your model for IP core generation with AXI4-stream video interfaces

Featured Examples