HDL Verifier Support Package for Microsemi FPGA Boards

Debug and test HDL code on Microsemi FPGAs using FPGA-in-the-loop

Release Notes

Release Notes

HDL Verifier™ Support Package for Microsemi^® FPGA Boards contains the board definition files for FPGA-in-the-loop (FIL) simulation with HDL Verifier and supported Microsemi FPGA and SoC FPGA boards. With FIL simulation, use MATLAB^® or Simulink^® to test designs in real hardware for any existing HDL code. The HDL code can either be manually written or generated from a model subsystem.

Setup and Configuration

Install hardware support, update firmware, configure hardware connection

FPGA-in-the-Loop Simulation

Verification with FPGA hardware

Trials
Product Updates

HDL Verifier Support Package for Microsemi FPGA Boards

Setup and Configuration

FPGA-in-the-Loop Simulation

HDL Verifier Support Package for Microsemi FPGA Boards Documentation

Support

Try MATLAB, Simulink, and Other Products