With the Communications Toolbox™ Support Package for USRP Embedded Series Radio, you can design an SDR algorithm in Simulink®, and then prototype your design on the USRP embedded series radio. You can either deploy a hardware-software (HW/SW) co-design implementation partitioned between the ARM® processor and the FPGA fabric of the underlying Zynq® system on chip (SoC), or prototype the design targeting the FPGA fabric only. The workflow is available in Simulink only.
|Create radio object for interfacing with USRP embedded series radio hardware|
|E3xx Receiver||Receive data from USRP E3xx radio hardware|
|E3xx Transmitter||Send data to USRP E3xx radio hardware|
- Hardware-Software Co-Design Overview
Learn the basics of the hardware-software co-design feature in this support package and its software requirements.
- Installation for Hardware-Software Co-Design
Install and configure additional support packages and third-party tools required by hardware-software co-design workflow.
- Hardware-Software Co-Design Workflow
Deploy partitioned hardware-software co-design implementations for SDR algorithms.
- Guidelines for Configuring the Software Interface Model
Configure your model for continuous and packet-based transmission and reception.
- System Timing
Explore ARM processor scheduler options for the software interface model.
- FPGA Targeting Workflow
Prototype SDR algorithms on the FPGA fabric only.
Troubleshooting Hardware-Software Co-Design
Resolve issues encountered while using the hardware-software co-design workflow.