Learn how many companies are reducing FPGA design cycle time by 33-50% or more by adopting workflows based on MATLAB and Simulink. In this presentation, engineers from MathWorks and Intel demonstrate how MATLAB and Simulink are used to design FPGAs for applications such as signal processing, image processing, communications, and control systems.

Topics covered include:

• Introduction to system modeling with MATLAB and Simulink
• Fixed-point and floating-point design considerations
• Target-independent HDL code generation using Simulink HDL Coder from MathWorks
• Intel-specific HDL code generation from Simulink using Intel DSP Builder
• Optimization of HDL code generation for performance and area
• HDL Verification using Simulink models as test benches
• Integration with Intel Quartus II

About the Presenters:
Eric Cigan is in MathWorks technical marketing supporting FPGA design workflows. Prior to joining MathWorks, he held technical marketing roles at MathStar, AccelChip, and Mentor Graphics. Eric earned BS and MS degrees in mechanical engineering from the Massachusetts Institute of Technology.

Jordon Inkeles is the senior product manager for Intel’s software and DSP products.  He has been with Intel for over 12 years in various product marketing and corporate marketing management roles. Prior to joining Intel, he held marketing and applications engineering roles at Semtech and Xicor.