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IP Core Generation Basics

Learn the basics of IP core generation

When you target hardware by using HDL Coder™, you can follow one workflow with two different starting points, depending on your goal:

  • To rapidly prototype an off-the-shelf, pre-existing hardware platform, prototype and deploy your HDL algorithm for your FPGA using a pre-existing board and reference design and start the Hardware-Software Co-Design workflow.

  • For a production workflow that targets a custom device, create a custom hardware platform. Then follow the Hardware-Software Co-Design workflow.

For more details, see Targeting FPGA & SoC Hardware Overview and Hardware-Software Co-Design Workflow for SoC Platforms.

Tools

IP Core EditorConfigure IP core for target hardware (Since R2023b)

Classes

hdlcoder.WorkflowConfigConfigure HDL code generation and deployment workflows

Topics

Featured Examples

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