customize

Class: hdlcoder.FloatingPointTargetConfig.IPConfig
Package: hdlcoder

Customize IP configuration for specified floating-point library

Syntax

fpconfig.IPConfig.customize(Name,DataType,Name,Value)


Description

fpconfig.IPConfig.customize(Name,DataType,Name,Value) customizes the fpconfig floating-point configuration with additional options specified by one or more Name,Value pair arguments.

Input Arguments

Name — Name of the floating-point IP

'' (default) | character vector

Name of the floating-point IP to customize, specified as a character vector.

Example: 'ADDSUB'

DataType — Data type of the floating-point IP

'' (default) | character vector

Data type of the floating-point IP to customize, specified as a character vector.

Example: 'SINGLE'

Name-Value Arguments

Specify optional pairs of arguments as Name1=Value1,...,NameN=ValueN, where Name is the argument name and Value is the corresponding value. Name-value arguments must appear after other arguments, but the order of the pairs does not matter.

Before R2021a, use commas to separate each name and value, and enclose Name in quotes.

Latency — Latency of the floating-point IP

-1 (default) | positive integer

Specify a custom latency value for the floating-point IP as an integer.

Example: fpconfig.IPConfig.customize('ADDSUB','Double','Latency', 6) specifies a custom latency value of 6 for the ADDSUB IP.

ExtraArgs — Specify additional arguments of the floating-point IP

'' (default) | character vector

Specify additional arguments of the floating-point IP as a character vector.

Example: fpconfig.IPConfig.customize('ADDSUB','Double','Latency',6,'ExtraArgs','CSET c_mult_usage=Full_Usage') specifies that you want to use DSP blocks on the target device.

Examples

Create and Customize Floating Point Configuration and Generate Code

This example shows how to create a floating-point target configuration with Altera® Megafunctions (ALTFP) in HDL Coder, and then generate code.

Create a Floating-Point Target Configuration

To create a floating-point configuration, use hdlcoder.createFloatingPointTargetConfig. Before creating a configuration, set up the path to your synthesis tool.

hdlsetuptoolpath('ToolName', 'Altera Quartus II', ...
    'ToolPath', 'C:/Altera/16.0/quartus/bin64/quartus.exe');
load_system('sfir_single')
fpconfig = hdlcoder.createFloatingPointTargetConfig('ALTFP')

Prepending following Altera Quartus II path(s) to the system path:
C:\Altera\16.0\quartus\bin64

fpconfig = 

  FloatingPointTargetConfig with properties:

            Library: 'ALTFP'
    LibrarySettings: [1×1 fpconfig.LatencyDrivenMode]
           IPConfig: [1×1 hdlcoder.FloatingPointTargetConfig.IPConfig]

Specify Custom Library Settings

Optionally, to customize the floating-point configuration, specify custom library settings.

fpconfig.LibrarySettings.LatencyStrategy = 'MAX';
fpconfig.LibrarySettings.Objective = 'AREA';
fpconfig.LibrarySettings

ans = 

  LatencyDrivenMode with properties:

    LatencyStrategy: 'MAX'
          Objective: 'AREA'

View Latency of Floating-Point IPs

The IPConfig object displays the maximum and minimum latency values of the floating-point operators.

fpconfig.IPConfig

ans = 

      Name              DataType            MinLatency    MaxLatency    Latency    ExtraArgs
    _________    _______________________    __________    __________    _______    _________

    'ABS'        'DOUBLE'                    1             1            -1         ''       
    'ABS'        'SINGLE'                    1             1            -1         ''       
    'ADDSUB'     'DOUBLE'                    7            14            -1         ''       
    'ADDSUB'     'SINGLE'                    7            14            -1         ''       
    'CONVERT'    'DOUBLE_TO_NUMERICTYPE'     6             6            -1         ''       
    'CONVERT'    'NUMERICTYPE_TO_DOUBLE'     6             6            -1         ''       
    'CONVERT'    'NUMERICTYPE_TO_SINGLE'     6             6            -1         ''       
    'CONVERT'    'SINGLE_TO_NUMERICTYPE'     6             6            -1         ''       
    'COS'        'SINGLE'                   35            35            -1         ''       
    'DIV'        'DOUBLE'                   10            61            -1         ''       
    'DIV'        'SINGLE'                    6            33            -1         ''       
    'EXP'        'DOUBLE'                   25            25            -1         ''       
    'EXP'        'SINGLE'                   17            17            -1         ''       
    'LOG'        'DOUBLE'                   34            34            -1         ''       
    'LOG'        'SINGLE'                   21            21            -1         ''       
    'MUL'        'DOUBLE'                   11            11            -1         ''       
    'MUL'        'SINGLE'                   11            11            -1         ''       
    'RECIP'      'DOUBLE'                   27            27            -1         ''       
    'RECIP'      'SINGLE'                   20            20            -1         ''       
    'RELOP'      'DOUBLE'                    1             3            -1         ''       
    'RELOP'      'SINGLE'                    1             3            -1         ''       
    'RSQRT'      'DOUBLE'                   36            36            -1         ''       
    'RSQRT'      'SINGLE'                   26            26            -1         ''       
    'SIN'        'SINGLE'                   36            36            -1         ''       
    'SQRT'       'DOUBLE'                   30            57            -1         ''       
    'SQRT'       'SINGLE'                   16            28            -1         ''       

Customize Latency of ADDSUB IP

Using the customize method of the IPConfig object, you can customize the latency of the floating-point IP and specify any additional arguments.

fpconfig.IPConfig.customize('ADDSUB','Single','Latency',6);
fpconfig.IPConfig

ans = 

      Name              DataType            MinLatency    MaxLatency    Latency    ExtraArgs
    _________    _______________________    __________    __________    _______    _________

    'ABS'        'DOUBLE'                    1             1            -1         ''       
    'ABS'        'SINGLE'                    1             1            -1         ''       
    'ADDSUB'     'DOUBLE'                    7            14            -1         ''       
    'ADDSUB'     'SINGLE'                    7            14             6         ''       
    'CONVERT'    'DOUBLE_TO_NUMERICTYPE'     6             6            -1         ''       
    'CONVERT'    'NUMERICTYPE_TO_DOUBLE'     6             6            -1         ''       
    'CONVERT'    'NUMERICTYPE_TO_SINGLE'     6             6            -1         ''       
    'CONVERT'    'SINGLE_TO_NUMERICTYPE'     6             6            -1         ''       
    'COS'        'SINGLE'                   35            35            -1         ''       
    'DIV'        'DOUBLE'                   10            61            -1         ''       
    'DIV'        'SINGLE'                    6            33            -1         ''       
    'EXP'        'DOUBLE'                   25            25            -1         ''       
    'EXP'        'SINGLE'                   17            17            -1         ''       
    'LOG'        'DOUBLE'                   34            34            -1         ''       
    'LOG'        'SINGLE'                   21            21            -1         ''       
    'MUL'        'DOUBLE'                   11            11            -1         ''       
    'MUL'        'SINGLE'                   11            11            -1         ''       
    'RECIP'      'DOUBLE'                   27            27            -1         ''       
    'RECIP'      'SINGLE'                   20            20            -1         ''       
    'RELOP'      'DOUBLE'                    1             3            -1         ''       
    'RELOP'      'SINGLE'                    1             3            -1         ''       
    'RSQRT'      'DOUBLE'                   36            36            -1         ''       
    'RSQRT'      'SINGLE'                   26            26            -1         ''       
    'SIN'        'SINGLE'                   36            36            -1         ''       
    'SQRT'       'DOUBLE'                   30            57            -1         ''       
    'SQRT'       'SINGLE'                   16            28            -1         ''       

Generate Code

makehdl('sfir_single/symmetric_fir','FloatingPointTargetConfiguration',fpconfig, ...
        'TargetDirectory','C:/FloatingPoint/hdlsrc','SynthesisToolChipFamily','Arria10')

### Generating HDL for 'sfir_single/symmetric_fir'.
### Starting HDL check.
### Using C:\Altera\16.0\quartus\bin64\qmegawiz for the selected floating point IP library.
### The code generation and optimization options you have chosen have introduced additional pipeline delays.
### The delay balancing feature has automatically inserted matching delays for compensation.
### The DUT requires an initial pipeline setup latency. Each output port experiences these additional delays.
### Output port 0: 30 cycles.
### Output port 1: 30 cycles.
### Generating Altera(R) megafunction: altfp_add_single for latency of 6.
### Found an existing generated file in a previous session: (C:\FloatingPoint\hdlsrc\sfir_single\Altera\Arria10\unspecified\L6\altfp_add_single.vhd). Reusing the generated file.
### Done.
### Generating Altera(R) megafunction: altfp_mul_single for latency of 11.
### Found an existing generated file in a previous session: (C:\FloatingPoint\hdlsrc\sfir_single\Altera\Arria10\unspecified\L11\altfp_mul_single.vhd). Reusing the generated file.
### Done.
### Begin VHDL Code Generation for 'sfir_single'.
### Working on sfir_single/symmetric_fir as C:\FloatingPoint\hdlsrc\sfir_single\symmetric_fir.vhd.
### Generating package file C:\FloatingPoint\hdlsrc\sfir_single\symmetric_fir_pkg.vhd.
### Creating HDL Code Generation Check Report file://C:\FloatingPoint\hdlsrc\sfir_single\symmetric_fir_report.html
### HDL check for 'sfir_single' complete with 0 errors, 7 warnings, and 0 messages.
### HDL code generation complete.

The latency of the ADDSUB IP is 6 and not the maximum latency value of 14.

The generated VHDL code is saved in the hdlsrc folder.

Tips

Before using this function, create a floating-point target configuration object for the floating-point library that you specify. Select library as Altera Megafunctions (ALTERA FP FUNCTIONS), Altera Megafunctions (ALTFP), or Xilinx LogiCORE.

This example creates a floating-point target configuration for the Altera Megafunctions (ALTFP) library.

fpconfig = hdlcoder.createFloatingPointTargetConfig('ALTFP');

Version History

Introduced in R2016b