Simulink Model Design
R2026bYou can model your design in the Simulink® environment by using blocks from all
products that support HDL code generation. To filter the Simulink Library Browser to
show only HDL-supported blocks, enter hdllib. For a list of Simulink blocks supported for HDL code generation, see Simulink Block List (HDL Code Generation). In
this list, you see blocks available in both Simulink and HDL Coder™ libraries.
In addition to the HDL Coder sublibrary, the supported block libraries include blocks from Stateflow®, Communications Toolbox™, DSP System Toolbox™, Vision HDL Toolbox™, Wireless HDL Toolbox™, and HDL Verifier™ libraries.
Design the model with blocks that are compatible with HDL code generation, follow the HDL modeling guidelines, and run the HDL Code Advisor to update your model for HDL compatibility.
Categories
- Supported Blocks and Data Types
Supported block library and data types
- RAM and ROM Blocks
Mimic RAMs and ROMs on hardware using blocks in HDL RAMs library
- User-Defined MATLAB Functions
Create HDL-ready algorithms using blocks in User-Defined Functions library
- Stateflow Blocks
Create HDL-ready algorithms using blocks in Stateflow library
- Hierarchical Designs and Synchronous Hardware Behavior
Create subsystems and hierarchical HDL designs with State Control block
- Model References
Reuse models as blocks in other models
- Model Protection
Create a protected model for simulation and code generation to share with a third-party
- Model Configuration
Block implementation and model configuration parameter specification
- HDL Modeling Guidelines
Guidelines for designing HDL algorithm in your Simulink model
- Model Compatibility Checks
Description of the HDL Code Advisor, and how to use it to check and update your model for compatibility with HDL code generation
Featured Examples
Lane Detection
Implement a lane-marking detection algorithm for FPGAs.
QPSK Transmitter and Receiver
Design and verify a QPSK transmitter and receiver for hardware.
Field-Oriented Control of a Permanent Magnet Synchronous Machine
Generate HDL code for a Field-Oriented Control (FOC) algorithm for a Permanent Magnet Synchronous Machine (PMSM).
