Consideraciones sobre los bloques de Simulink

R2026b

Nombres, operaciones matemáticas, puertos y subsistemas, enrutamiento de señales, operaciones lógicas y de bits

Aplique directrices de alta integridad a nombres de bloques de Simulink^®, operaciones matemáticas, puertos y subsistemas, enrutamiento de señales, operaciones lógicas y de bits.

Directrices de modelado

expandir todo

Asignación de nombres

hisl_0031: Nombres de archivo de los modelos	Use naming conventions for model file names
hisl_0032: Nombres de elementos de los modelos	Naming conventions for model elements that produce valid identifiers in generated code

Operaciones matemáticas

hisl_0001: Uso del bloque Abs	Avoid unsupported data types and protect against integer overflow for the Abs block
hisl_0002: Uso de operaciones recíprocas y de resto	To support robustness of generated code, when using the Math Function block with remainder-after-division (`rem`) or reciprocal (`reciprocal`) operations
hisl_0003: Uso de operaciones de raíz cuadrada	To support robustness of generated code, when using the Square Root operations
hisl_0028: Uso de bloques Reciprocal Square Root	Protect inputs of the Reciprocal Square Root block to avoid undesirable results in generated code
hisl_0004: Uso de operaciones de logaritmos naturales y logaritmos en base 10	Protect against invalid inputs to logarithm operations
hisl_0005: Uso de bloques Product	Protect divisor inputs from becoming singular matrices in Product blocks
hisl_0029: Uso de bloques Assignment	Initialize array fields before first use in the Assignment block to avoid undesirable results in generated code
hisl_0066: Uso de bloques Gain	Set the Gain block value to a nonzero value other than 1 to support traceability of generated code
hisl_0067: Protección frente a cálculos de divisiones por cero	Protect the divisor from going to zero in divide operations to improve robustness of generated code

Ports & Subsystems

hisl_0006: Uso de bloques While Iterator	Set maximum number of iterations for While Iterator blocks to support bounded iterative behavior
hisl_0007: Uso del subsistema For Iterator o While Iterator	Avoid using sample time-dependent blocks within For Iterator or While Iterator subsystems
hisl_0008: Uso de bloques For Iterator	Configure For Iterator blocks to support bounded iterative behavior in generated code
hisl_0010: Uso de bloques If e If Action Subsystem	Connect If block outports to If Action Subsystem blocks and use else conditions to support verifiable generated code
hisl_0011: Uso de bloques Switch Case y Action Subsystem	To support verifiable generated code, when using the Switch Case block
hisl_0024: Definición de la interfaz del puerto de entrada	Define data type, port dimensions, and sample time for inports to support strong typing and unambiguous model behavior
hisl_0025: Especificación mín./máx. de diseño de las interfaces de entrada	Provide design minimum and maximum ranges for inport interfaces to support precise input interface specification
hisl_0026: Especificación mín./máx. de diseño de las interfaces de salida	Provide design minimum and maximum ranges for outport interfaces to support precise output interface specification
hisl_0075: Uso de enlaces de bibliotecas	Avoid disabled and parameterized library links for consistent simulation and code generation (Desde R2022a)
hisl_0077: Definición de la interfaz del puerto de salida	Define data type, port dimensions, and sample time for outport interfaces (Desde R2022b)
hisl_0078: Uso de patrones de modelado idénticos	Account for identical and similar modeling patterns to reduce code complexity (Desde R2024a)
hisl_0079: Conexiones a los puertos raíz de entrada/salida	Adhere to internal connection constraints on root-level Inport and Outport blocks to improve traceability (Desde R2024a)

Signal Routing

hisl_0015: Uso de bloques Merge	Use Merge blocks with mutually exclusive conditionally executed subsystems to support unambiguous behavior
hisl_0021: Método consistente de indexación de vectores	Use a consistent vector indexing method within a model to reduce the risk of indexing errors
hisl_0022: Selección del tipo de datos para las señales de indexación	Use an appropriate data type for index signals to prevent unexpected results and enable correct data access
hisl_0023: Verificación de bloques de variantes	Configure Variant block activation time to simplify consistency testing between a model and generated code
hisl_0034: Uso de bloques Signal Routing	Avoid the ~= operator on floating-point data types in Switch blocks to improve model robustness

Operaciones lógicas y de bits

hisl_0016: Uso de bloques que calculan operadores relacionales	Avoid using equality and inequality operators on floating-point data types
hisl_0017: Uso de bloques que calculan operadores relacionales (2)	Configure relational operator blocks to produce unambiguous behavior in generated code
hisl_0018: Uso del bloque Logical Operator	Configure the Logical Operator block to produce unambiguous behavior in generated code
hisl_0073: Uso de operaciones de desplazamiento de bits	Avoid shift operations greater than or equal to the bit-width to prevent violations of coding standards

Bloques Lookup Table

hisl_0033: Uso de bloques Lookup Table	Keep out-of-range protection enabled in Lookup Table blocks to protect against out-of-range inputs or indices
hisl_0072: Uso de parámetros ajustables para modelos referenciados	Use Simulink.Parameter objects to define tunable parameters and prevent unintended loss of tunability
hisl_0073: Uso de operaciones de desplazamiento de bits	Avoid shift operations greater than or equal to the bit-width to prevent violations of coding standards