Build, load, and execute SoC model on SoC-FPGA board
The SoC Builder tool steps through the various stages for building and executing an SoC model on an FPGA board.
Using this tool, you can:
Review the model information provided to the tool.
Review the memory map and edit it if needed.
Set up a folder to store all generated files.
Choose between different build actions.
Validate that the model has all required components for generating a programming file.
Build the model using Xilinx® Vivado® or Intel® Quartus® tool families.
Configure the Ethernet connectivity.
Load the programming file to your FPGA board.
Run the application.
In the model window, select Tools > SoC Builder.
MATLAB® command prompt: Enter
socBuilder(' opens SoC Builder and
loads the specified model into the tool.