CMOS OR

Behavioral model of CMOS OR gate

Libraries:
Simscape / Electrical / Integrated Circuits / Logic

Description

The CMOS OR block represents a CMOS OR logic gate behaviorally:

The block output logic level is HIGH if the logic levels of any of the gate inputs are 1.
The block output logic level is LOW otherwise.

The block determines the logic levels of the gate inputs as follows:

If the gate voltage is greater than the threshold voltage, the block interprets the input as logic 1.
Otherwise, the block interprets the input as logic 0.

The threshold voltage is the voltage value at midpoint between the High level input voltage parameter value and the Low level input voltage parameter value.

Note

To improve simulation speed, the block does not model all the internal individual MOSFET devices that make up the gate. See Assumptions and Limitations for details.

The block models the gate as follows:

The gate inputs have infinite resistance and finite or zero capacitance.
The gate output offers a selection of two models: Linear and Quadratic. For more information, see Selecting the Output Model for Logic Blocks. Use the Output current-voltage relationship parameter to specify the output model.
You can specify propagation delay for both output models. For Linear output, the block sets the value of the gate output capacitor such that the resistor-capacitor time constant equals the Propagation delay parameter value. For Quadratic output, the gate input demand is lagged to approximate the Propagation delay parameter value.

The block initial conditions depend on the output model selected:

For Linear model, the high initial condition corresponds to the High level output voltage parameter value, V_OH, and the low initial condition corresponds to the Low level output voltage parameter value, V_OL.
For Quadratic model, the high initial condition is a value close to the Supply voltage parameter value, Vcc, and the low initial condition is close to 0.

The block output voltage depends on the output model selected:

For Linear model, output high is the High level output voltage parameter value, and output low is the Low level output voltage parameter value.
For Quadratic model, the output voltage for High and Low states is a function of the output current, as explained in Quadratic Model Output and Parameters. For zero load current, output high is Vcc (the Supply voltage parameter value), and output low is zero volts.

Plot Input and Output Waveforms

You can plot the input and output waveforms of the CMOS OR block without building a complete model. Use the plots to explore the impact of your parameter choices on device characteristics. If you parameterize the block from a datasheet, you can compare your plots to the datasheet to check that you parameterized the block correctly. If you have a complete working model but do not know which manufactured part to use, you can compare your plots to datasheets to help you decide.

To plot the basic characteristics, right-click the block and select Electrical > Basic characteristics from the context menu.

Note

The plots you create using the Basic characteristics option do not show the effect of the Propagation delay parameter on the output voltage of logic blocks.

Assumptions and Limitations

The block does not model the internal individual MOSFET devices that make up the gate (except for the final MOSFET pair if you select the Quadratic option for the Output current-voltage relationship parameter). This limitation has the following implications:

The block does not accurately model the gate's response to input noise and inputs that are around the logic threshold voltage.
The block does not accurately model dynamic response.

Circuits that involve a feedback path around a set of logic gates may require a nonzero propagation delay to be set on one or more gates.

Ports

Conserving

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A — Input port
electrical

Electrical conserving port associated with the CMOS OR input.

B — Input port
electrical

Electrical conserving port associated with the CMOS OR input.

J — Output port
electrical

Electrical conserving port associated with the CMOS OR output.

Parameters

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Inputs

Low level input voltage — Low level input voltage
`2` `V` (default)

Voltage value below which the block interprets the input voltage as logic LOW.

High level input voltage — High level input voltage
`3` `V` (default)

Voltage value above which the block interprets the input voltage as logic HIGH.

Average input capacitance — Average input capacitance
`5` `pF` (default)

Fixed capacitance that approximates the input capacitance for a MOSFET gate. The MOSFET capacitance depends on the applied voltage. When you drive this block with another gate, the Average input capacitance produces a rise time similar to that of the MOSFET. You can usually find this capacitance value on a manufacturer datasheet. Setting this value to zero may result in faster simulation times.

Outputs

Output current-voltage relationship — Output current-voltage relationship
`Linear` (default) | `Quadratic`

Select the output model:

Linear - This is the default value.
Quadratic

Low level output voltage — Low level output voltage
`0` `V` (default)

Voltage value at the output when the output logic level is LOW.

Dependencies

This parameter is visible only when you select Linear for the Output current-voltage relationship parameter.

High level output voltage — High level output voltage
`5` `V` (default)

Voltage value at the output when the output logic level is HIGH.

Dependencies

This parameter is visible only when you select Linear for the Output current-voltage relationship parameter.

Output resistance — Output resistance
`25` `Ohm` (default)

Value of the series output resistor that is used to model the drop in output voltage resulting from the output current. You can derive this value from a datasheet by dividing the high-level output voltage by the maximum low-level output current.

Dependencies

This parameter is visible only when you select Linear for the Output current-voltage relationship parameter.