soc.sdk.ProcessingSystem class

Package: soc.sdk

Processing system definition in FPGACore object

Description

Use the soc.sdk.ProcessingSystem class to define the properties of a processing system in an FPGA core in a soc.sdk.Hardware object.

Creation

Description

processingSystemObj = soc.sdk.ProcessingSystem(name) creates an object that represents a processing system interface.

Properties

expand all

Full path to the processing system TCL file, specified as a character vector.

Example: '$(TARGET_ROOT)/tcl/ZCU106PS.tcl'

Attributes:

GetAccess
public
SetAccess
public

Data Types: char

Full path to constraint file, specified as a character vector.

Attributes:

GetAccess
public
SetAccess
public

Data Types: char

Master interface port label, specified as a character vector.

Example: 'zynq_ultra_ps/M_AXI_HPM0_FPD'

Attributes:

GetAccess
public
SetAccess
public

Data Types: char

Master interface clock port label, specified as a character vector.

Example: 'zynq_ultra_ps/maxihpm0_fpd_aclk'

Attributes:

GetAccess
public
SetAccess
public

Data Types: char

Master interface reset port label, specified as a character vector.

Attributes:

GetAccess
public
SetAccess
public

Data Types: char

Slave interface port label, specified as a character vector.

Example: 'zynq_ultra_ps/S_AXI_HPC0_FPD'

Attributes:

GetAccess
public
SetAccess
public

Data Types: char

Slave interface clock port label, specified as a character vector.

Example: 'zynq_ultra_ps/saxihpc0_fpd_aclk'

Attributes:

GetAccess
public
SetAccess
public

Data Types: char

Slave interface reset port label, specified as a character vector.

Attributes:

GetAccess
public
SetAccess
public

Data Types: char

Interrupt interface port label, specified as a character vector.

Example: 'zynq_ultra_ps/pl_ps_irq0'

Attributes:

GetAccess
public
SetAccess
public

Data Types: char

Minimum to maximum range of slave interface frequency, specified as a two-element numeric vector.

Example: [1 200]

Attributes:

GetAccess
public
SetAccess
public

Data Types: double

Minimum to maximum range of first write latency, specified as a two-element numeric vector.

Attributes:

GetAccess
public
SetAccess
public

Data Types: double

Minimum to maximum range of last write latency, specified as a two-element numeric vector.

Attributes:

GetAccess
public
SetAccess
public

Data Types: double

Minimum to maximum range of first read latency, specified as a two-element numeric vector.

Attributes:

GetAccess
public
SetAccess
public

Data Types: double

Minimum to maximum range of last read latency, specified as a two-element numeric vector.

Attributes:

GetAccess
public
SetAccess
public

Data Types: double

Slave interface data width, specified as a numeric vector.

Attributes:

GetAccess
public
SetAccess
public

Data Types: double

Label of the clock output port connected to the FPGA, specified as a character vector.

Example: 'zynq_ultra_ps/pl_clk0'

Attributes:

GetAccess
public
SetAccess
public

Data Types: char

Frequency of the clock output port connected to the FPGA, specified as a positive scalar numeric value.

Example: 100

Attributes:

GetAccess
public
SetAccess
public

Data Types: double

Label of the reset output port connected to the FPGA, specified as a character vector.

Example: 'zynq_ultra_ps/pl_resetn0'

Attributes:

GetAccess
public
SetAccess
public

Data Types: char

Introduced in R2019b