VHDL code as a Black Box subsystem

Is any documents to show integrating hand-written HDL code with "Black Box"? I cannot find any tutorials or examples.

[Walter Roberson]

Context: http://www.mathworks.com/matlabcentral/answers/12650-vhdl-verilog-simulink

Answer 1

[Tim McBrayer]

Simulink® HDL Coder™ does not have a published demo directly addressing the use of hand-written code with a Subsystem Black Box implementation. However, the tool's User's Guide documentation does contain a fairly comprehensive example performing exactly the task you are asking about. See the section entitled (in the R2011b documentation) "Black Box Implementation for Subsystem Blocks", which resides in the "Interfacing Subsystems and Models to HDL Code" chapter.

[Kaustubha Govind]

Here is the link: http://www.mathworks.com/help/toolbox/slhdlcoder/bso3rab-1.html