HDL Verifier Support Package for Microchip
Debug and test HDL code on Microchip FPGAs using FPGA-in-the-loop
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Actualizado
19 jun 2024
HDL Verifier™ Support Package for Microchip FPGA Boards contains the board definition files for FPGA-in-the-loop (FIL) simulation with HDL Verifier on supported Microchip FPGA and SoC FPGA boards. With FIL simulation, use MATLAB® or Simulink® to test designs in real hardware for any existing HDL code. The HDL code can either be manually written or generated from a model subsystem using HDL Coder.
Supported boards include the
- PolarFire™ Evaluation Kit
- SmartFusion®2 Advanced Development Kit (M2S150-ADV-DEV-KIT)
- RTG4 Development Board (RTG4-DEV-KIT)
This support package is functional for R2018a or higher.
Compatibilidad con la versión de MATLAB
Se creó con
R2018a
Compatible con cualquier versión desde R2018a hasta R2024b
Compatibilidad con las plataformas
Windows macOS (Apple Silicon) macOS (Intel) LinuxCategorías
Más información sobre FPGA, ASIC, and SoC Development en Help Center y MATLAB Answers.
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