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Generate HDL for Preconfigured Algorithm with DSP HDL IP Designer App

The DSP HDL IP Designer app lets you select and configure hardware-optimized algorithms and generate HDL code for those algorithms without having to create a Simulink® model or MATLAB® script.

Alternatively, you can design your algorithm outside the app and then open the app by providing a preconfigured System object™ from the command line by calling dsphdlIPDesigner(ObjVariable). You can also design a filter using filterDesigner, then go to the Targets menu, and select Generate HDL to open the DSP HDL IP Designer app.

When you use a DSP HDL Toolbox™ System object, the app copies all the properties of the object into the app. When you use a DSP System Toolbox™ System object, or you open the app from filterDesigner, the app copies the filter structure, filter coefficients, and coefficient data type from your specified algorithm.

Once your algorithm is loaded in the app, you can specify input stimulus, configure code generation options, and generate HDL code and testbenches. For an example of calling the app with a System object, see Open App with Preconfigured Algorithm.

Supported Algorithms

You can open the app with any DSP HDL Toolbox System object. For the complete list, see DSP HDL Toolbox System objects.

The app also supports these DSP System Toolbox System objects:

Open App with Preconfigured Algorithm

This example shows how to configure your algorithm by using a System object™ and then open the app to generate HDL code and testbenches for the algorithm. Part one shows how to open the app with preconfigured DSP System Toolbox™ filter objects, and part two shows how to design a numerically controlled oscillator (NCO) by using DSP HDL Toolbox™ objects.

Part 1: DSP System Toolbox™ Filter Object

This example shows the lowpass filter design from the Removing High-Frequency Noise from an ECG Signal example.

Design a minimum-order lowpass filter with a passband edge frequency of 200 Hz and a stopband edge frequency of 400 Hz. The desired amplitude of the frequency response and the weights are specified in A and D vectors, respectively. The firgr function takes these specifications and returns filter coefficients. Pass these designed coefficients to the dsp.FIRFilter object.

Fs = 1000;
Fpass = 200;
Fstop = 400;
Dpass = 0.05;
Dstop = 0.0001;
F = [0 Fpass Fstop Fs/2]/(Fs/2);
A = [1 1 0 0];
D = [Dpass Dstop];
b = firgr('minorder',F,A,D);
LP = dsp.FIRFilter('Numerator',b);

To open the app with your preconfigured algorithm loaded, call the app with the System object as an argument, dsphdlIPDesigner(LP). The app opens with a Discrete FIR Filter algorithm configured with the filter structure, coefficients, and coefficient data type from the object. The filter implements a direct-form systolic architecture, which is a fully parallel filter. You can change the algorithm properties to configure the hardware implementation of the filter.

Choose data types for your hardware filter implementation. Consider which data types can represent your coefficients efficiently, and how many resources the filter uses. The app displays the input and output data types on the connecting arrows. The default data type for the filter coefficients is the same as the input data type. On the Data Types tab, you can specify a custom data type for the coefficients or the output data.

Click the Input Stimulus block to specify an input data vector to set the input data type, and the data values applied in the generated testbenches. The image shows the default input settings. The default input data type is fi(1,16,15), and the generated testbenches apply 200 random data samples to the filter.

You can set the input stimulus to realistic data for your application. For instance, load the app-lowpassECG-ex.mat file to load the same data generation code as the Removing High-Frequency Noise from an ECG Signal example. This code generates an ECG signal and adds high-frequency noise to it.

For more examples of input configuration, see Setting Input Stimulus.

Once you have configured your data types and input data values, you can set HDL code and testbench generation options, and generate HDL code for the algorithm. The generated testbenches apply the custom ECG data from the code entered in the Input Stimulus block.

Part 2: DSP HDL Toolbox NCO Object

This code configures a numerically controlled oscillator (NCO) to generate a sine wave with these specifications:

F0 = 510;     % Target output frequency in Hz
dphi = pi/2;  % Target phase offset
df = 0.05;    % Frequency resolution in Hz
minSFDR = 96; % Spurious free dynamic range(SFDR) in dB 
Ts = 1/4000;  % Sample period in seconds

Calculate the number of accumulator bits required for the frequency resolution and the number of quantized accumulator bits needed to satisfy the SFDR requirement. The actual frequency resolution achieved is 1/(Ts*2^Nacc).

Nacc = ceil(log2(1/(df*Ts)));
Nqacc = ceil((minSFDR-12)/6);

Calculate the phase increment and offset to achieve the target frequency and offset.

phIncr = round(F0*Ts*2^Nacc);
phOffset = 2^Nacc*dphi/(2*pi);

Create a dsphdl.NCO System object with properties set to the calculated settings.

nco510 = dsphdl.NCO(PhaseIncrementSource='Property', ...
    PhaseIncrement=phIncr, ...
    PhaseOffset=phOffset, ...
    NumDitherBits=4, ...
    NumQuantizerAccumulatorBits=Nqacc, ...
    AccumulatorWL=Nacc);

To open the app with your preconfigured algorithm loaded, call the app with the System object as an argument, dsphdlIPDesigner(nco510).

This configuration of the NCO object has no input stimulus to configure. You can set HDL code and testbench generation options, and generate HDL code for the algorithm.

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