Model and Architecture Design

Supported blocks, best practices, design patterns, compatibility checks, Simscape™ modeling, clocks and reset signals

You can either import the HDL code or develop models for HDL code generation in the Simulink® modeling environment. When developing your model, you can use Simulink blocks and Simscape switched linear elements, follow the HDL modeling guidelines, and run the HDL Code Advisor to update your model for HDL compatibility. You can then generate HDL code, verify the generated code, and then deploy the code onto target devices.

Categories

  • Model Compatibility Checks
    Description of the HDL Code Advisor, and how to use it to check and update your model for compatibility with HDL code generation
  • Model Design
    Create supported block library and design HDL-compatible models by using blocks from these libraries
  • Block Configuration
    Block implementation specification, model configuration
  • Clocking and Multirate Design
    Clock generation, HDL code generation guidelines for multirate models
  • External Component Interfaces
    Integrate the external components like custom HDL code and vendor-specific AMD or Intel blocks
  • HDL Import
    Import HDL code into the Simulink modeling environment using the importhdl function
  • Model Protection
    Create a protected model for simulation and code generation to share with a third-party
  • Native Floating Point
    HDL Coder native floating-point, the various features supported, how to model your design, generate HDL code, and verify the generated code

Featured Examples

Generate SystemVerilog Code for a Simulink Model

Generate SystemVerilog Code for a Simulink Model

Generate SystemVerilog HDL code from a Simulink® model. SystemVerilog code has more advanced features over that Verilog® code, such as the use of array ports, package declarations, structure ports and more.