stop

Stop FPGA data capture execution based on current status in nonblocking mode

Since R2022a

Syntax

stop(DC)

Description

stop(DC) stops the execution of the data capture object DC based on the current status in nonblocking capture mode. Stop execution of the specified data capture object when the current status of the object is 'Waiting for trigger'. If you want to cancel the capture attempt (for example, if the trigger condition does not occur), use this function to return control to the object. When you cancel a capture attempt, no data is returned to MATLAB^®.

Note

The stop function is not supported in blocking capture mode.

Examples

Stop FPGA Data Capture Execution

Before you use this example, you must have previously generated the customized data capture object using the FPGA Data Capture Component Generator tool. You must also have integrated the generated IP code into your project and deployed it to the FPGA. The data capture object communicates with the FPGA over a JTAG cable. Make sure that the required cable is connected between the board and the host computer.

This example uses a generated object, datacapture, that defines two signals for data capture. Signal A is 16 bits and signal B is 8 bits. Both signals are also available for use in trigger conditions. The sample depth is 1024 samples.

Create a data capture object, DC, that captures data from a design running on an FPGA. datacapture is the generated IP name you specified in the FPGA Data Capture Component Generator tool.

DC = datacapture

DC = 

  datacapture with properties:

              Connection: 'JTAG'
    IsConditionalCapture: 0
         TriggerPosition: 0
       NumCaptureWindows: 1
        NumTriggerStages: 1
                 TimeOut: 10
       EnableCaptureCtrl: 0
             CaptureMode: 'blocking'
           JTAGCableName: 'auto'
     MaxNumTriggerStages: 1

Change the capture mode to nonblocking mode.

DC.CaptureMode = 'nonblocking';

Check the current status of the data capture object.

status = checkStatus(DC)

status = 

  struct with fields:

    CapturedWindows: 0
          RunStatus: 'Not started'
       TriggerStage: 0

Define a trigger condition to capture data when the signal B is equal to 255.

setTriggerCondition(DC,'B',true,255);

Use the step function to capture data on the specified trigger event.

dataOut = step(DC);

Check the current status of the data capture object.

status = checkStatus(DC)

status = 

  struct with fields:

    CapturedWindows: 0
          RunStatus: 'Waiting for trigger'
       TriggerStage: 1

Stop data capture.

stop(DC);

Check the current status of the data capture object.

status = checkStatus(DC)

status = 

  struct with fields:

    CapturedWindows: 0
          RunStatus: 'Stopped'
       TriggerStage: 1

Input Arguments

DC — Customized data capture object

hdlverifier.FPGADataReader System object™

Customized data capture object, specified as an hdlverifier.FPGADataReader System object.

Version History

Introduced in R2022a