dpigen
Generate UVM or SystemVerilog DPI component from MATLAB function
Add-On Required: This feature requires the ASIC Testbench for HDL Verifier add-on.
Syntax
Description
dpigen
generates a DPI component shared library from MATLAB® function fcn
-args args
fcn
and all the functions that
fcn
calls.
.dll
for shared libraries on Microsoft® Windows® systems.so
for shared libraries on Linux® systems
The dpigen
function also generates a
SystemVerilog package file, which contains the function declarations.
The argument -args args
specifies the type of inputs
the generated code can accept. The generated DPI component is specialized to
the class and size of the inputs. Using this information,
dpigen
generates a DPI component that emulates
the behavior of the MATLAB function.
fcn
and —args args
are
required input arguments. The MATLAB function must be on the MATLAB path or in the current folder.
dpigen
generates a SystemVerilog or a UVM component based on the template and
settings specified in an fcn
-config
config -args args
svdpiConfiguration
object. For more information about
SystemVerilog and UVM templates, see SystemVerilog and UVM Templates.
dpigen
generates a SystemVerilog DPI component shared library according to the
options specified. You can specify zero or more optional arguments, in any
order. fcn
-args args
-testbench tb_name
options
files
-c
-launchreport
-PortsDataType
type -ComponentTemplateType
template_type
-testbench tb_name
also generates a testbench for the SystemVerilog DPI component. The MATLAB testbench must be on the MATLAB path or in the current folder.options
specifies additional options for the compiler and code generation.files
specifies custom files to include in the generated code.-c
generates C code only.-launchreport
generates and opens a code generation report.-PortsDataType
specifies the SystemVerilog data type to use for ports.-ComponentTemplateType
specifies whether the design is sequential or combinational.
When generating a DPI component, it creates a shared library specific to that host platform. For example, if you use 64-bit MATLAB on Windows, you get a 64-bit DLL, which can be used only with a 64-bit HDL simulator in Windows. For porting the generated component from Windows to Linux, see Port Generated Component and Testbench to Linux.
Examples
Input Arguments
Version History
Introduced in R2014bSee Also
svdpiConfiguration
| codegen
(MATLAB Coder) | uvmbuild