addPortGroup

Add port group mapping to svdpiConfiguration object

Since R2023a

Add-On Required: This feature requires the ASIC Testbench for HDL Verifier add-on.

Syntax

addPortGroup(svdpiConfig,groupName,portNames)

Description

addPortGroup(svdpiConfig,groupName,portNames) adds a port group named name to the svdpiConfiguration object, and assigns the ports listed in portNames to that group.

Examples

Add Ports to Scoreboard

Create a configuration object using the UVM scoreboard template. Then add port groups to the object:

• inFromMon — monitor inputs to the scoreboard

• inFromPred — predictor inputs to the scoreboard

• inErrorThreshold — configuration inputs to the scoreboard

c = svdpiConfiguration('uvm-scoreboard');
addPortGroup(c, 'MONITOR_INPUTS','inFromMon'); % single input
addPortGroup(c, 'PREDICTOR_INPUTS',{'inFromPred1','inFromPred2'}); % array of 2ports
addPortGroup(c, 'CONFIG_OBJECT_INPUTS',{'inErrorThreshold'});

Add Ports to Predictor

Create a configuration object using the UVM predictor template. Then add port groups to the object:

• inFromMon — monitor inputs to the predictor

• inErrorThreshold — configuration inputs to the predictor

c = svdpiConfiguration('uvm-predictor');
addPortGroup(c, 'PREDICTOR_INPUTS','inFromMon'); % single input
addPortGroup(c, 'CONFIG_OBJECT_INPUTS',{'inErrorThreshold'});

Add Ports to Sequence

Create a configuration object using the UVM sequence template. Then add a configuration port group to the object:

snr — configuration inputs to the sequence, defining sound to noise ratio.

c = svdpiConfiguration('uvm-sequence');
addPortGroup(c, 'CONFIG_OBJECT_INPUTS',{'snr'});

Input Arguments

svdpiConfig — SystemVerilog DPI configuration

svdpiConfiguration object

SystemVerilog DPI configuration, specified as an svdpiConfiguration object.

groupName — HDL port group name

string | character vector

Add a port group to the svdpiConfiguration object. Specify the name of the port group and a list of ports as a string or character vector, separated by a comma.

Example: name='CONFIG_OBJECT_INPUTS',{'pErrorThreshold'} adds an input port group named 'CONFIG_OBJECT_INPUTS', with the ports listed in {'pErrorThreshold'}

portNames — HDL ports assigned to port group

string | character vector | cell array

Specify names of HDL ports to assign to the port group.

• A string or character vector for a single port

• A cell array of strings or character vectors for multiple ports

Version History

Introduced in R2023a

R2023b: Sequence and Predictor templates support configuration ports

Add configuration ports to your UVM sequence or predictor by adding a CONFIG_OBJECT_INPUTS port group. Use the addPortGroup function to map configuration inputs to the UVM component.

The predictor template has two new port groups: PREDICTOR_INPUTS and CONFIG_OBJECT_INPUTS. By default, ALL_INPUTS = PREDICTOR_INPUTS. You can define CONFIG_OBJECT_INPUTS or PREDICTOR_INPUTS, and then ALL_INPUTS = PREDICTOR_INPUTS + CONFIG_OBJECT_INPUTS.

Similarly, the sequence template has two new port groups: SEQUENCE_INPUTS and CONFIG_OBJECT_INPUTS. By default, ALL_INPUTS = SEQUENCE_INPUTS. You can define CONFIG_OBJECT_INPUTS or SEQUENCE_INPUTS, and then ALL_INPUTS = SEQUENCE_INPUTS + CONFIG_OBJECT_INPUTS.