Simulate and analyze performance metrics of analog to digital data converters. Start from complete system-level models of typical ADC architectures, such as SAR or flash ADC. Modify ADC parameters until you reach your desired system specifications. Use Measurements and Testbenches to validate your design.
ADC Reference Architectures
- Compare SAR ADC to Ideal ADC
This example shows a comparison of the SAR ADC from the Mixed-Signal Blockset™ to the ideal ADC model with impairments presented in Analyzing Simple ADC with Impairments.
- Effect of Metastability Impairment in Flash ADC
This example shows how to customize a flash Analog to Digital Converter (ADC) by adding the metastability probability as an impairment.
- Compare Binary Weighted DAC to Ideal DAC
This example shows a comparison of the Binary Weighted DAC from the Mixed-Signal Blockset™ to an ideal DAC model.
- Delta Sigma Modulator Data Converter with Half-Band Filter for Decimation
This example shows how to use the Delta Sigma Modulator (DSM) data converter block with a downstream decimation filtering scheme.