loadBinaries
Description
Examples
Load Existing Binaries Using Command Line Interface
Use MATLAB® commands to load binaries in a project folder onto the ZedBoard™.
Set the synthesis tool path to point to an installed Vivado® Design Suite. When you execute this command, use your own Xilinx® Vivado installation path.
hdlsetuptoolpath('ToolName','Xilinx Vivado','ToolPath', ... 'C:\Xilinx\Vivado\2022.1\bin\vivado.bat');
Create an socModelBuilder
object for the
soc_hwsw_top
SoC model.
obj = socModelBuilder('soc_hwsw_top')
obj = socModelBuilder with properties: ModelName: 'soc_hwsw_top' ProjectFolder: 'soc_prj' BuildType: 'Processor and FPGA' ExternalMode: 0 RunExternalFPGABuild: 1
Change the project folder to G:\R2023a\myProject
.
obj.ProjectFolder = 'G:\R2023a\myProject'
obj = socModelBuilder with properties: ModelName: 'soc_hwsw_top' ProjectFolder: 'G:\R2023a\myProject' BuildType: 'Processor and FPGA' ExternalMode: 0 RunExternalFPGABuild: 1
Load the binaries in the G:\R2023a\myProject
project folder to
the most recently connected hardware board.
loadBinaries(obj);
Load the binaries in the G:\R2023a\myProject
project folder onto
the ZedBoard.
hw = socHardwareBoard('ZedBoard');
loadBinaries(obj,hw);
Input Arguments
obj
— SoC model builder
socModelBuilder
object
SoC model builder, specified as an socModelBuilder
object. Use this object to build, load, and execute an SoC
model on the SoC or FPGA board.
hardware
— Hardware object
socHardwareBoard
Hardware object, specified as a socHardwareBoard
object that represents the connection to the SoC or FPGA
board.
Version History
Introduced in R2023a
See Also
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