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Pixel Stream FIFO

Buffer input stream to create image lines that have contiguous valid pixels

  • Library:
  • Vision HDL Toolbox / Utilities

  • Pixel Stream FIFO block

Description

The Pixel Stream FIFO block stores incoming valid pixels and accompanying control signals and returns the same pixel stream without gaps between the valid pixels of each line. The block preserves the total line size and total frame size of the video stream, including invalid cycles.

Use the Pixel Stream FIFO block to buffer video sources. The waveform shows a direct memory access (DMA) video source, where pixels are read in bursts, and a Camera Link® video source, where pixels are valid every second clock cycle. To create contiguous video lines, a Pixel Stream FIFO block buffers the input pixels and control signals of each source.

Ports

This block uses a streaming pixel interface with a pixelcontrol bus for frame control signals. This interface enables the block to operate independently of image size and format. All Vision HDL Toolbox™ blocks use the same streaming interface. The block accepts and returns a scalar pixel value and a bus that contains five control signals. The control signals indicate the validity of each pixel and its location in the frame. To convert a frame (pixel matrix) into a serial pixel stream and control signals, use the Frame To Pixels block. For a full description of the interface, see Streaming Pixel Interface.

Input

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Single image pixel in a pixel stream, specified as a scalar value that represents intensity, or a vector of 1-by-N color components.

double and single data types are supported for simulation, but not for HDL code generation.

Data Types: uint8 | uint16 | uint32 | int8 | int16 | int32 | fixed point | Boolean | double | single

Specify a pixelcontrol bus that contains five signals. The signals describe the validity of the pixel and its location in the frame. For more information, see Pixel Control Bus.

Data Types: bus

Output

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Single image pixel in a pixel stream, returned as a scalar value representing intensity, or a vector of 1-by-N color components. The output pixel data type is the same as the data type of the input pixels.

double and single data types are supported for simulation, but not for HDL code generation.

Data Types: uint8 | uint16 | uint32 | int8 | int16 | int32 | fixed point | Boolean | double | single

Control signals accompanying pixel stream, returned as a pixelcontrol bus containing five signals. The signals indicate the validity of the pixel and its location in the frame. For more information on the signal protocol, see Pixel Control Bus.

The Pixel Stream FIFO block returns each line of pixels with the ctrl.valid signal continuously true between ctrl.hStart and ctrl.hEnd. The block buffers the entire input line before it returns the modified line.

Data Types: bus

Parameters

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Specify a power of two that accommodates the number of active pixels in a single horizontal line.

If you specify a value that is not a power of two, the block uses the next largest power of two.

Algorithms

The Pixel Stream FIFO block contains a memory controller, read and write counters, and two RAMs. One RAM stores the incoming control signals, and the other stores the incoming pixel stream. The block stores valid pixels and their accompanying control signals for each line, as determined by the input ctrl.hStart and ctrl.hEnd signals. The buffering removes any bursty behavior of the input stream. Once a full line of valid pixels is stored, the block returns the new continuous version of the line.

Extended Capabilities

Introduced in R2018a