filter vhdl coder accuracy

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siripong
siripong el 21 de Jul. de 2011
Sorry for a long description. This is my first time looking for some help in Matlab. I am trying to generate VHDL synthesizable code for some simple FIR lowpass and bandpass filters utilizing HDL coder provided in the filterbuilder. My input signal is 12 bit with 0 fraction. The coefficient is set for 16 bit with numerator fraction length of 15. I set order mode for 100 coefficients with single rate, partial serial with partition of 26, 25, 25, 25. Once code is generated, I examined the generated code and found some issues of accuracy. I am puzzling why it does series of truncation and resizing values for part of the code. Here is the code portion that I don't understand:
mul_temp <= inputmux_1 * product_1_mux; product_1 <= mul_temp(22 DOWNTO 0);
prod_typeconvert_1 <= resize(product_1, 28);
add_temp <= resize(prod_typeconvert_1, 29) + resize(acc_out_1, 29); acc_sum_1 <= add_temp(27 DOWNTO 0);
Here is part of the signal declaration:
SIGNAL product_1 : signed(22 DOWNTO 0); -- sfix23_En20 SIGNAL product_1_mux : signed(15 DOWNTO 0); -- sfix16_En15 SIGNAL mul_temp : signed(27 DOWNTO 0); -- sfix28_En20 SIGNAL prod_typeconvert_1 : signed(27 DOWNTO 0); -- sfix28_En20 SIGNAL acc_sum_1 : signed(27 DOWNTO 0); -- sfix28_En20 SIGNAL acc_in_1 : signed(27 DOWNTO 0); -- sfix28_En20 SIGNAL add_temp : signed(28 DOWNTO 0); -- sfix29_En20
Can you tell me why it truncates # bits of mul_temp to 23 and then resize it back to 28?
Regards, Siripong S.

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