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Error while targeting FPGA through simulink, I am trying to implement 'OFDM Transmit and Receive Using Analog Devices AD9361/AD9364' example of MATLAB.

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We have successfully completed all the steps of HDL Workflow advisor (till 4.4). We were also successful in completing the setup of Communication Toolbox Support package for Xilinx Zynq based radio and Embedded coder support. When we ran Build, Deploy and Start of the software interface model, it showed Build process completed successfully. But when we ran the monitor and tune option, it showed 'code generation information file doesn't exist' under Rebuild reason. Following Errors were also displayed:
1) Block Diagram Error: Error occurred while executing external mode Mex-file 'ext_comm': Failed to connect to target. Caused by: An error occurred attempting to open an rtIOStream.
2) Model Error: Unable to connect to the Xilinx Zynq evaluation kit target for zynq interface.
We are using ZC706 and FMCOMMS5. I have also setup the IP address of Zynq as 192.168.3.2 and y host machines IP address is 192.168.3.1. How should I correct these errors, please guide!

Respuestas (2)

Kiran Kintali
Kiran Kintali el 31 de Dic. de 2022
I think you are referring to this demo.
OFDM Transmit and Receive Using Analog Devices AD9361/AD9364
Can you reach out to tech support on this case with the following details?
Are you experiencing the error with the interface model generated by the HDL Workflow Advisor gm_zynqRadioHWSWOFDMAD9361AD9364SL_interface or with the shipped interface model zynqRadioHWSWOFDMAD9361AD9364SL_interface?
If you are able to successfuly complete the workflow advisor steps, try to run zynqRadioHWSWOFDMAD9361AD9364SL_interface from the command prompt beofre running this model on hardware.

Avinash
Avinash el 11 de En. de 2023

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