FIL I/O options missing in the FIL wizard.
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Hi, I am using MATLAB R2022b and Vivado 2020.2. I am trying to put the Zynq (xc7z020-2clg400) board as FPGA-in-the-loop in Simulink. And I noticed- when opening FIL wizard, FIL I/O is missing. I do not know why this is happening and it will be helpful if someone can put some light on it. I have attached the figure below where the FIL I/O missing are highlighted.
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Tom Richter
el 16 de Nov. de 2023
Hi Charanraj,
I assume you refer to the FIL I/O panel in the FPGA Board Wizard of the FPGA Board Manager. You can access the FPGA Board Manager by clicking on Launch Board Manager in the FIL Wizard.
Best regards,
Tom
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Tom Richter
el 24 de Nov. de 2023
Hi Charanraj,
sorry for the delay. I checked your steps and now have an answer. You selected a Zynq device. For Zynq we do not support direrect ethernet (ethernet can be used via PS and LibIIO driver for FIL).
When you select e.g. Artix7 you will get this:
![](https://www.mathworks.com/matlabcentral/answers/uploaded_files/1551302/image.png)
and on the next page this:
![](https://www.mathworks.com/matlabcentral/answers/uploaded_files/1551307/image.png)
You can see that the FIL I/O is only related to ethernet port settings not JTAG. So you did nothing wrong and it should work.
Best regards,
Tom
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