unable to find FTD2XX library path

Hi,

When i use

 h=aximanager('AMD','JTAGCableType','FTDI');

in Ubuntu 20.04 LTS system.

An error occurs:

error using fpgadebug_mex

failed to open FTDI JTAG cable: Unable to find FTD2XX library path'

Error in hdlverifier.AXIManagerJTAG/openCable

Error in hdlverifier.AXIManagerJTAG

However, the ftd2xx driver has been installed on my computer.

Answer 1

[Heman P]

Hi KH,

The error 'Unable to find FTD2XX library path' typically appears when the user has not installed the 'HDL Verifier Support Package for AMD FPGA and SoC Devices' on their host MATLAB system.

Can you check the "Add-Ons" section on your installed MATLAB and confirm the above mentioned SPKG name in the "Add-Ons -> Manage Add-Ons"?

Thanks,

Heman, P

[KH]

Hi,

Thanks for your reply.

I just checked my add-ons. ''HDL Verifier Support package for amd fpga and soc devices'' has been installed. And the fpga in loop test passes? Should I re-install the package?

[Heman P]

Hi KH,

Investigated and came to know that our AXI Manager codebase is currently unable to retrieve the SPKG installation path for the FTD2XX library on the Linux platform.

As a result, you are facing the error message: 'Failed to open FTDI JTAG cable: Unable to find FTD2XX library path.'

But the same issue is not there with Windows platform.

This confirms the necessity for an update on the Linux side to correctly return the path.

Since, this pertains to the internal codebase of the AXI Manager script, we will address this issue through an SPKG update for the affected versions.

In the meantime, we can provide you with a working patch file to ensure that you can continue using the AXI Manager functionality without any disruption to your application.

Could you please specify the version of MATLAB you are using?

Thanks,

Heman, P

[KH]

Thanks for your reply, I'll solve the problem later.

The matlab version I use is 2024b.

Answer 2

[Heman P]

Hi KT,

Please find the patch file 'AXIManagerJTAG.zip' from the attachment.

This zip file contains the 'AXIManagerJTAG.p' MATLAB p-code file, compatible with MATLAB version R2024b on Linux.

Copy the file ‘AXIManagerJTAG.p’ to the SPKG installation path:

"/home/<user_name>/Documents/MATLAB/SupportPackages/R2024b/toolbox/hdlverifier/supportpackages/fpgadebug/+hdlverifier"

After copying the file, launch the MATLAB and perform the following commands on MATLAB console:

rehash toolbox
rehash toolboxcache

Please let me know if this patch file works in your setup environment.

Thanks,

Heman, P

[Tong]

I am facing the same issue but after putting your file in that folder, the program halts on mem = aximanager('AMD') line. Do you have any suggestions? I am running 2024b on RedHat8.

[Heman P]

Hi Tong,

Please ensure that while copying, MATLAB session has been closed.

After copying the patch file 'AXIManagerJTAG.p' to the suggested path, you need to re-launch the MATLAB and issue the following commands:

rehash toolbox
rehash toolboxcache

Before creating an AXI Manager object, can you execute the following command on MATLAB console:

FTD2XXPath = matlab.internal.get3pInstallLocation('ftcjtag.instrset')

Let me know the above command is returning the right path:

'/home/<username>/Documents/MATLAB/SupportPackages/R2024b/3P.instrset/ftcjtag.instrset'

Thanks,

Heman, P

[Tong]

Thank you for your answer! I actually decided to switch back to windows but the issue persists. I am using matlab 2024.2 and the program halts on the line mem = aximanager('AMD') but when i unplug the fpga, it throws the error below. Do you have similar solutions to the one you posted here?

>> mem = aximanager('AMD', 'Interface', 'JTAG');

Error using fpgadebug_mex

Failed to open Digilent JTAG cable: Did not find any Digilent(R) JTAG

cable.

Failed to open FTDI JTAG cable: Failed to turn off three phase data

clocking.

Error in hdlverifier.AXIManagerJTAG/openCable

Error in hdlverifier.AXIManagerJTAG

Error in aximanager

[Heman P]

Hi Tong,

For FT2232H devices, 3 Phase clocking was not being enabled. As a result, our code attempts to disable three-phase data clocking as part of the initialization process.

In your case, it appears that the device is identified and opened successfully. However, the issue arises during the initialization phase of the opened device.

This seems to be a temporary problem. Could you please try restarting MATLAB and reconnecting the JTAG cable between your target FPGA device and the host machine?

Thanks,

Heman, P

[Tong]

Hi, Thanks a lot for helping!

I tried to restart multiple times after I tried reinstalled diligent driver in C:\Xilinx\Vivado\2024.2\data\xicom\cable_drivers\nt64\digilent; installed the ftdi driver; set vivado to my system path (ftdi link: https://ftdichip.com/drivers/d2xx-drivers/) and also reconfiguring my usb host controller settings to not allowing computer to turn off this device. USB Serial Port COM3 is the port connecting to JTAG. After I turn on FPGA, I did write anything to it but the issue persists. Should I try a different version of matlab?

[Heman P]

Hi, could you please share which FPGA board you're using with the AXI Manager over the JTAG interface? So that it will help us attempt to reproduce the issue on our end.