PIL Simulation Warning: “Top model does not contain a referenced model” – Is My Simulation Valid?
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    nour ouzeri
 el 30 de Mayo de 2025
  
    
    
    
    
    Comentada: nour ouzeri
 el 4 de Jun. de 2025
            Hello,
I am performing a Processor-in-the-Loop (PIL) simulation on a control subsystem of a fuel-cell model using Simulink/Simscape and an STM32F429 target with Embedded Coder.
I used the option "Create SIL/PIL block" for the subsystem, followed by C/C++ Code > Build This Subsystem, and then added the generated block to my model for testing(fuel-cell model).
When I run the simulation, I get the following warning:
"Top model does not contain a referenced model. ‘Simulation’ and ‘SIL/PIL Simulation’ will behave in the same way. Change 'system under test' or add a model block to the top model."
At the same time, the simulation output curves for normal simulation and PIL are identical (confondues), which is expected, but this warning makes me unsure.
My questions:
- Does this warning indicate that the PIL simulation is not actually running on the target hardware?
 - Since I'm testing only a control subsystem using a PIL block, and not the entire model, is it safe to ignore this warning?
 - Do I need to replace the subsystem with a referenced model (Model block) to properly use PIL at the top level?
 
Thank you in advance for your help!
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  TED MOSBY
 el 3 de Jun. de 2025
        
      Editada: TED MOSBY
 el 3 de Jun. de 2025
  
      You can freely ignore the warning. The warning here simply means: you told the SIL/PIL Manager that the System under test is Top model, but the top-level diagram does not contain any Model block that has been switched to SIL or PIL mode. In that situation the manager can’t see anything to switch, so it warns you that Normal and SIL/PIL runs will look identical.
1. Does this warning indicate that the PIL simulation is not actually running on the target hardware?
No, The PIL block you created from the subsystem is self-contained: when the simulation reaches that block, the generated code is downloaded and executed on your STM32 target, inputs/outputs are exchanged, and execution-time metrics are collected. So it is running on the target hardware. 
2. Since I'm testing only a control subsystem using a PIL block, and not the entire model, is it safe to ignore this warning?
Yes, it’s safe to ignore. The Manager is warning you only because its drop-down is set to “System under test → Top model”, yet there is no Model block in SIL/PIL mode for it to manage. To remove the warning you can try pointing the manager at the block: System under test → Model block and select your PIL block.
3. Do I need to replace the subsystem with a referenced model (Model block) to properly use PIL at the top level?
It is totally optional, and only required if you want the Top-model workflow. Convert to a Referenced Model only when you want the extra bookkeeping conveniences (quick mode-switching, reports, reuse).
Hope this helps!
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