hdl coder dual port ram
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Hi,
I am facing asertion error in dual port RAM, as I want to write the into PORTA and read from PORTB. But there is not read enable signal therefore what shour be input signla value to portB adress when it is ideal or during the portA is getting filled ?
If I have a counter then that counter always start from 0 and portA counter also start from 0 that mean both have to access same address at the same time.
Please help me to solve this problem
thank you
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