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Why Root-Level Inport didn't inherit the sample time?

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Benjamin Wang
Benjamin Wang el 27 de Feb. de 2017
Hi guys,
I want to build a fixed-step discrete time model, which will be referenced later in a larger model. To simplify the issue, let's say it's just a direct-through, including only one input port connected to one output port.
Because the model doesn't restricted to any specific sample time, I set the solver pane as following.
Before I actually reference it to the real larger model, I want to do a quick test using base workspace variables. Here is the settings of the Data Import/Export pane.
And here is how I constructed my test signal.
t = (0 : 0.1 : 10)';
u = rand(size(t));
After I ran the model, I found that the output signal y has fewer samples than the input signal x. This is due to the fact that it has a default sample time (0.2).
>> whos
Name Size Bytes Class Attributes
t 101x1 808 double
u 101x1 808 double
y 51x1 408 double
How can I make the model inherit the sample time of the external test signal correctly?
Thanks!

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