shift register SIPO Simulink

Hi everybody,

I need to use Simulink to generate VHDL code that I can use after with GHDL (an other software).

My problem is to make a shift register. With Simulink my register seems to work but when I try to use it with VHDL is not working.

Could you please help me to make a shift register SIPO (1 input => 8 Output) with a MATLAB function or HDL FIFO or an other block of Simulink?

I use the last version of MATLAB (2017).

I hope I have been clear about my problem, thanks for your help.

Answer 1

[Trig]

in the matlab window type:

 open_system('eml_hdl_design_patterns')

and then double click on the third box labeled "Shift Registers"

you should be able to implement what you want by reading these examples - if not come back, post a new question with code examples and your specific question.

[Sela]

Thanks, I think it make me in a good way to make a shift register. I take the first one but I don't understand what are supposed to be one input (sr_in).

function sr_out = fcn(shift, sr_in)
%shift register 1 by 8

persistent sr;
if isempty(sr)
    sr = fi(0, 0, 8, 0, 'fimath', fimath(sr_in));
end

% return sr[7]
sr_out = getmsb(sr);

if (shift)
    % sr_new[8:1] = sr[7:1] & sr_in
    sr = bitconcat(bitsliceget(sr, 8, 1), sr_in);
end

When I try to run this I have this error :

Inferred size ('scalar') for data 'sr_out' does not match back propagated size ('[1 8]') from Simulink.

Could you help me with this please?

[Sumukh Bharadwaj]

Hi David,

That is such a good solution.

But when Delays/Integer delays are used, I get this error; "Undefined function or variable u_d. The first assignment to a local variable determines its class"

What is this error all about? I don't understand it to debug myself. Please tell me

[Trig]

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