I am getting the following error when trying to update diagram:
Incoming buses to block 'TMPEST__FuelSys/MainFuelSystem/Plant/FuelChillHXPump/SigAssign' have a dimension mismatch. The signal at
input port 5 of 'TMPEST__FuelSys/Switch_CFTtall/Switch' is of width 5, while its corresponding signal at input port 5 of
'TMPEST__FuelSys/MainFuelSystem/Plant/FuelChillHXPump/HeatLoadComponent/SigAssign' is of width 1. This error message is related to a
hidden SubSystem block.
I was going to try adding a Signal Specification block in a couple places to see if that would straighten things out, but it's unclear to me how to properly specify the width/dimensions for a bus signal. The bus signal is defined by the object SLBUS_ENGCYCLE_HEATLOAD_REAL which has four doubles plus a sub-bus with 5 doubles as shown below ( getFullBusTree is my own function, not a built-in).
Element Name Data Type
So for a Signal Specification block, would the 'Dimensions' be 1 (since it's not an array of this type of bus) or 5 (the number of elements of the SLBUS_ENGCYCLE_HEATLOAD_REAL bus itself) or 9 (the expanded number of double leaf nodes)?