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Hello everyone,

I have problem figuring out somthing in the example model named "DC/DC Buck Converter" from "Support Package for Texas Instrument c2000 Processors".

In this model, inside the subsystem "PI_Controller_ISR", the output of ADC block is gone to two successive Data Type Conversion blocks. The ADC output is 12bit and therefore is a Integer from 0 to 4095. But the first conversion block is set to output a fixdt(0,16,12) number, which can be between 0 and 15.999755859375, with precision of 0.000244140625 (According to the Data Type Assistant in the block), and the second Conversion block is set to output a fixdt(1,32,24) (between -128 and 127.99999994039536 with precision of 5.960464477539063e-08.

Why these two conversion blocks are configured this way? I mean their input comes from the ADC and is an INTEGER between 0 and 4095. Why their output range is this way? they can not have output greater than 15.999 !!

Secondly, Why is the high fraction precision required while the input is integer?

And there is another thing: why two blocks are used? (the first one is set to Stored Integer (SI), and the second one is set on Real World Value (RWV). I don't know the difference and why it should be this way.

I really appreciate it if someone can help me in this regard. Thanks in advance for your answers.

Antonin
on 21 Jan 2019

Hi Saeed Heshmatian,

Welcome to the world of Fixed-Point!

In many of our examples, we like to keep our units between -1 and 1 in a fixed point format. So voltages, currents, speed, position signals are all normailzed in signals that move from -1 to 1 in a high precision fixed-point format (24 bits (Q24) for the decimal part). 1 represents the max value, i.e. max voltage, or max current, -1 the minimum value. For currents, the max value is defined by the max value the ADC can measure. For voltages, the max is defined by 100% PWM duty cycle on the output.

Why do we do this? Fixed point math is more efficient than float, even on microcontrollers that have an FPU. The control loop in the example that you mention runs at 200kHz (5µs), you can't waste CPU cycles at that rate.

Why -1 to 1? When you multiply 2 signlas ranging from -1 to 1, you get a signal ranging from... -1 to 1. Therefore you can keep the same fixed-point format (Q24) throughout the model and skip expensive and complicated fixed-point conversions. The algorithm also becomes agnostic to engineering units and can be ported from one hardware platform ot another.

How does that appy to the DC/DC buck converter example? The ADC gives you a signal from 0 to 4095, where 0 is 0 Amperes and 4095 the max current, I don't care how much it is at this point, I will just call it 1. That's a 12-bit signal, so the conversion to fixed-point Q12 is trivial, you just have to take the bits the way they are and treat the signal as an unsigned fixed-point signal in Q12. That's what the first conversion block does, SI (Stored Integer) means "Take the bits the way they are and treat this signal as ufix Q12". Now we have a signlal that moves from 0 to 1 in Q12, but like I said above we like to use a better fixed-point precision for the rest of the model, so I convert this signal to Q24, which is the format that we use for the rest of the model. That's what the second conversion block does. In this case, the bits need to change (it's actually a shift by 12 to the left), the RWW (Real Worl Value) tells Simulink to do the conversion on the signal, so the bits needs to be shifted by 12 to reach the Q24 format. I now have my current moving from 0 to 1 (negative values are not possible here) in Q24 format and all you will see in the generated code is a shift by 12 to do the scaling from the ADC value, which is very efficient.

While sending the signals to the host, you can convert back the normalized signals into engineering units that are easier to read. I would do this on the host so you don't waste time on the target.

I hope it helps,

Cheers,

Antonin.

Mohammad Tauquir Iqbal
on 21 Jun 2019

very nice explanation.

if i am right the first block change data to 0 to 1 fromat in Q12

while other shift 12 bit in -1 to 1 fromat (Q24)

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