Get data from AD (parallel), is possible?

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Jonis Maurin Ceará
Jonis Maurin Ceará el 14 de Nov. de 2019
Respondida: arash arash el 4 de Mzo. de 2020
Hi. I'm new to matlab. I'm a hobbyst, not a company or anything like this. I brought MATLAB personal with some modules and I'll use to learn FPGA with ZedBoard + AD9361. I know that this board (both) are supported by simulink and I'll test/learn using simulink and block-design. My plan is to make an FM transmitter (for start) when my boards arrive (already brought, still waiting delivery). After that, my plan is to make an receiver and then, do the same receiver, but using another frontend (including ADC). So my question is: imagine that I have plugged in another ADC into my ZedBoard (let's say AD9226), is possible to read this ADC in simulink, like AD9361 does? If yes, how? Where can I find any article or tutorial about this?
Even further: if I want to generate HDL code in the future (using HDL Coder), how can I integrate this 'custom' AD for code generation?
PS: I know that I can't buy HDL Coder for personal. My plan is to use trial for testing, since I'm using just for learning.
Thank you.

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Noam Levine
Noam Levine el 14 de Nov. de 2019
Editada: Noam Levine el 14 de Nov. de 2019
Jonis - To start, the Communications Toolbox™ Support Package for Xilinx® Zynq®-Based Radio supports the ZedBoard+AD-FMComms2/3/4 hardware combination for both Radio I/O and Targeting. We have a streaming FM Receiver example that can likely be adapted to that platform (try replacing the ADALM-PLUTO receive System object with the AD936x receiver).
To use other converters with ZedBoard, there are several parts to the equation - the HDL for the Zynq programmable logic to physically build the connection between the devices, the Linux drivers running on the Zynq processing system to control the converter, and a Vivado reference design to tell HDL Coder what the hardware looks like. Is the converter you want to use available on a standard FMC, or PMOD card for evaluation?
Analog Devices has built a library of HDL refernce designs for Xilinx devices available on their Wiki. Also on their Wiki are a variety of Linux drivers for many of their products. If they don't have interface, or driver code, for the partiuclar device you want to use, their Engineer Zone community (either the FPGA Reference Design, or Linux Software Driver forums) should be able to generate a solution. Information on how to build a custom reference design for HDL Coder can be found in the MathWorks examples.
MATLAB and Simulink support for other ADI converters can also be found in their High Speed Converter Toolbox.
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Jonis Maurin Ceará
Jonis Maurin Ceará el 15 de Nov. de 2019
Actually, my ADC has no PMOD, but it's direct connected to FPGA. It's a AD9200 with 10-bit. Doesn't haven sny SPI or other type of control.....that's why I don't think I'll need linux modules (for ARM side of zynq). So my question is: is possible to read data directly from these direct connected pins using MATLAB and Simulink?

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Más respuestas (2)

Noam Levine
Noam Levine el 15 de Nov. de 2019
With the Zedboard (and likely other Zynq-based systems), the converter may be connected to pins tied to programmable logic (PL), but the host interface is typically connected through the processing system (PS) on Zynq, through an Ethernet link to the PC, so something needs to manage the data flow to the host, and the data flow over the AXI interface in the Zynq between the PL and PS. That something is typically Linux, and if you plan to use MATLAB and Simulink to generate code for the Zynq, eventually, the IP core generation workflow assumes that there is a Linux OS running on the PS. Even for just data I/O into MATLAB and Simulink, our hardware support packages use a Linux libIIO framework to manage hardware-to-host communications. Check-out the Analog Devices Wiki for an good intorduction to libIIO.
If there's no PMOD board, or FMC card for the ADC you want to use, how do you plan to connect it to the ZedBoard, or are you planning to build your own board? Do you have already have an HDL design from which you can generate a bitstream for the Zynq to configure it to talk to the ADC (generate the right clocks, ensure it meets timing, etc)?
  1 comentario
Jonis Maurin Ceará
Jonis Maurin Ceará el 15 de Nov. de 2019
That's clear now!
No, I don't have any design right now. Still doing some research...I would like to avoid using Linux and generate all codes direct for PL, so I could use the same 'program' on other model of FPGA (and not only zynq family).....but I'm not sure anymore if this will be possible using Matlab.
About ADC, I'll connect my own breakboard to PMOD port of ZedBoard.....but I don't plan to make this board as PMOD compatible (I'm not sure if is possible to make what I want, really).
Like I said before, I'm very new to both FPGA and MatLab. I'm a 'procedural' programmer, so sorry if I ask any dumb question.

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arash arash
arash arash el 4 de Mzo. de 2020
hello friends
thank you if anyone has simulated this article

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