Estadística
0 Preguntas
15 Respuestas
CLASIFICACIÓN
2.002
of 300.379
REPUTACIÓN
32
CONTRIBUCIONES
0 Preguntas
15 Respuestas
ACEPTACIÓN DE RESPUESTAS
0.00%
VOTOS RECIBIDOS
4
CLASIFICACIÓN
of 20.931
REPUTACIÓN
N/A
EVALUACIÓN MEDIA
0.00
CONTRIBUCIONES
0 Archivos
DESCARGAS
0
ALL TIME DESCARGAS
0
CLASIFICACIÓN
of 168.299
CONTRIBUCIONES
0 Problemas
0 Soluciones
PUNTUACIÓN
0
NÚMERO DE INSIGNIAS
0
CONTRIBUCIONES
0 Publicaciones
CONTRIBUCIONES
0 Público Canales
EVALUACIÓN MEDIA
CONTRIBUCIONES
0 Temas destacados
MEDIA DE ME GUSTA
Feeds
HDLCoder RAM mapping not working
When RAM Mapping fails there should be a warning in the generated report that gives more information about what happened. In th...
7 meses hace | 0
Failed to generate the HDL dlhdl
The supported versions are here: https://www.mathworks.com/help/hdlcoder/gs/language-and-tool-version-support.html This page ...
alrededor de 2 años hace | 0
How to initialize Xilinx UltraRAMs?
My understanding is that you're correct, and that there's no easy way around it. Since the hardware doesn't support initializin...
más de 2 años hace | 0
Efficient packing of data for BlockRAMs, UltraRAMs
The RAM block interprets vectors of data to mean you want separate RAM banks. In order to store and retreive the data as a sing...
más de 2 años hace | 3
| aceptada
imread error obtaining file type
Do the 4 bytes at the beginning of the files' data match one of the numbers defined by the tif file format? If not, and if that...
más de 2 años hace | 0
HDL Counter with programmable limit
Would a free running counter with a reset port connected to a comparison work for your use case?
más de 2 años hace | 0
| aceptada
Matlab HDL coder error: reptmat is not supported, but in the documentation it is.
Specifying parameters with the syntax ProductWordLength=24 is not yet supported by HDL Coder. The call to fimath can be changed...
más de 2 años hace | 0
Generating asynchronous delays with HDL coder in Simulink
Since transport delays, inertial delays, and wait statements are simulation-only, non-synthesized VHDL constructs that are ignor...
más de 2 años hace | 0
| aceptada
How to control custom Altera/Intel FPGA board using Simulink
That message means it is expecting plugin_board.m to be located at "+DE10NANO_Registration/+qsys_base/plugin_board.m" and either...
más de 2 años hace | 0
| aceptada
Unable to perform assignment because brace indexing is not supported for variables of this type.
It looks like sub_matrix is a matrix rather than a cell array, so it should be accessed with parenthesis: sub_matrix(i, j) = ....
casi 3 años hace | 0
HDLCoder hdl.ram: Error System Object methods can only be called once
The problem here isn't that you're using both ram_2p and ram_rx (that is allowed), but that HDL Coder doesn't know this access p...
casi 3 años hace | 0
| aceptada
Get error using hdl.ram
Calling "step" inside of a loop is not currently supported. Instead of having this loop inside of the design executing 128 time...
casi 3 años hace | 0
Why does my simulink chart generate an error with data type fixdt(0,8,0) or fixdt(0,16,0) but not other sizes 7,9,10 etc.
As a workaround, you may be able to define the type directly inside of the symbols pane, or if it is an input set the type to in...
casi 3 años hace | 0
HDL Coder Variable Size Matrix
coder.varsize is declaring a variable size matrix: https://www.mathworks.com/help/coder/ref/coder.varsize.html Initializing t...
casi 3 años hace | 0
| aceptada
This text contains non-empty top-level expressions. It appears to be a script.
HDL Coder is expecting a function, rather than a script: https://www.mathworks.com/help/matlab/matlab_prog/create-functions-in-...
casi 3 años hace | 1
