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Jast


Last seen: 3 meses ago Active since 2015

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Simulink HDL Coder - Filter - Fully Serial Interfacing
Thanks for the answer. It seems to be indeed that way, the clock should be N times faster than the sample clock, and then it ...

casi 6 años ago | 0

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Simulink HDL Coder - Filter - Fully Serial Interfacing
I have generated an IIR filter using FDAtool, ported it to simulink, and got it running on an FPGA in full parallel mode. Now I ...

casi 6 años ago | 2 answers | 0

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