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Xilinx Zynq Platform

Generate and deploy HDL code and embedded software on Xilinx® Zynq®-7000 platform

HDL Coder™ can generate an IP core, integrate it into your Vivado® project, and program the Zynq hardware. Using Embedded Coder®, you can generate and build the embedded software, and run it on the ARM® processor. See Hardware-Software Co-Design Workflow for SoC Platforms.

To deploy your design to the Zynq hardware, you must install the HDL Coder Support Package for Xilinx Zynq Platform. For installation information, see HDL Coder Supported Hardware.

HDL Coder Support Package for Xilinx Zynq Platform supports the generation of IP cores that can be integrated into FPGA designs using Xilinx Vivado or Xilinx ISE. When used in combination with Embedded Coder Support Package for Xilinx Zynq Platform, this solution can program the Xilinx Zynq SoC using C and HDL code generation. The hardware-software co-design workflow spans simulation, prototyping, verification, and implementation.


  • Setup and Configuration
    Download and install support package for use with third-party EDA tools and supported hardware
  • Hardware-Software Co-Design Basics
    Learn about the hardware-software co-design workflow and how to use the Workflow Advisor to run the algorithm on the SoC platform
  • Modeling
    Model your algorithm in Simulink® by using a simplified protocol for mapping to AXI4-Stream, AXI4-Stream Video, or AXI4 Master interfaces
  • Custom IP Core Generation
    Generate HDL IP core from your DUT for deployment to the default system reference design or custom reference design registered with the board
  • Custom Board and Reference Design
    Define and register custom reference design or custom board for Xilinx Zynq Platform
  • Deployment and Verification
    Create bitstream containing user programming and download it to Xilinx Zynq Platform