Main Content

Import Structured Text Code Generated from Model Reference Hierarchy

Since R2025a

This example shows how to import and integrate the IEC 61131-3 Structured Text code generated from a model reference hierarchy in the CODESYS 3.5 IDE. Use Model referencing in Simulink® to improve:

  • Symbol naming consistency

  • Model configuration consistency

Generate Structured Text Code and Test Bench

Generate the Structured Text code and test bench for the model reference hierarchy.

  1. Open the GenerateStructuredTextCodeForModelReferenceHierarchyExample example files

    openExample("plccoder/GenerateStructuredTextCodeForModelReferenceHierarchyExample")

  2. Open the simple_top model. Open the PLC Coder app, and click Settings. In the PLC Code Generation pane, set Target IDE to CODESYS 3.5, and select the Generate testbench for subsystem check box. Click OK.

  3. Select the Subsystem block. In the PLC Code tab, click Generate PLC Code.

Import Generated Structured Text Code

To import the generated Structured Text code, you must import these files:

  • If present, the file that contains the global symbols for the top and reference models in the target IDE. Symbol file names have the format top_model_name_symbols.* .

  • The Structured Text code files for the referenced model subsystems. Import the files in the reverse order of the model dependency. You can use the Dependency Analyzer tool to analyze the model dependency order. See, Analyze Model Dependencies.

To import the generated Structured Text files and the symbols file:

  1. Open the CODESYS V3.5 IDE. You can use CODESYS 3.5 SP 16+ or later.

  2. Create a new project. Select Standard project and set the project name. Set Device to CODESYS Control Win3 x64 (CODESYS) and set PLC_PRJ in to Structured Text (ST).

  3. Select Application and click Project > Import PLCopenXML. Navigate and select the simple_top_symbols.xml file. Select GVL_CONSTS and GVL_VARS, and click OK. If you do not have a symbols file, skip this step.

  4. Click Project > Import PLCopenXML. Navigate and select the simple_sub1.xml and simple_sub2.xml files. Select Subsystem and b_Subsystem, and click OK.

  5. Click Project > Import PLCopenXML. Navigate and select the simple_top.xml. Select c_Subsystem, MainTB, and TestBench. Click OK.

Build, Download, and Verify Generated Code

Build and download the generated Structured Text code to the CODESYS software-based programmable logic controller (SoftPLC).

  1. in the CODESYS IDE set the main task interval time to match the top model top-level subsystem sample time. To set the main task interval time, in the CODESYS IDE double-click MainTask (IEC-Tasks) in the Devices pane and set the time in Interval (e.g. t#200ms). To find the top-model top-level subsystem time in the simple_top model, open the model, right-click the Subsystem block, select Block Parameters (Subsystem), and view the time set in the Sample time (-1 for inherited) parameter. If the value is -1 set the Sample time (-1 for inherited) to 0.1 and set the Interval (e.g. t#200ms) time in CODESYS to 100 .

  2. In the CODESYS IDE, click Build > Build, and Build > Generate Code.

  3. Start the SoftPLC by selecting CODESYS Control Win SysTray - x64 from the Windows® tray, and then select Start PLC.

  4. Click Online > Login. If you are logging in for the first time, set up your user name and password. If you are an existing user, then enter your login credentials.

  5. Delete PLC_PRG from Application and Task Configuration. Right-click MainTask (IEC-Tasks) and select Add Object > Program Call. Under POU to call, browse and select MainTB. Click OK.

  6. Click Online > Download to download the code to the SoftPLC.

  7. Double-click TestBench and click Debug > Start. Observe the values changing in the TestBench program. When testCycleNum is 51 and testVerify is TRUE, the test bench code has passed verification and the imported code is verified.

See Also

Topics