Simulink models to Verilog HDL coder

i am trying to convert EVD model to verilog code but it doesnt take matrices as input, plz guide.

1 comentario

Walter Roberson
Walter Roberson el 16 de En. de 2012
Is the problem with all matrices, or is it just requiring that the size of the matrix be fixed ?

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Preguntada:

el 16 de En. de 2012

Respondida:

el 6 de Mzo. de 2023

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