Phase Locked Loop tutorial

A tutorial showing how Phase-Locked Loops, both analog and digital can be efficiently modeling in Si
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Actualizado 1 Sep 2016

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This tutorial starts with a simple conceptual model of an analog Phase-Locked Loop (PLL). Through elaboration it ends at a model of an all digital and fixed-point phase-locked loop. The final model can serve a starting point for code generation (both ANSI C or synthesizable HDL).
The step-wise elaboration of the model illustrates how Simulink® forms the basis a model-based design where continuous verification of the model reduces errors.

Citar como

Giorgia Zucchelli (2024). Phase Locked Loop tutorial (https://www.mathworks.com/matlabcentral/fileexchange/14868-phase-locked-loop-tutorial), MATLAB Central File Exchange. Recuperado .

Compatibilidad con la versión de MATLAB
Se creó con R2007a
Compatible con cualquier versión
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Versión Publicado Notas de la versión
1.0.0.1

Updated license

1.0.0.0