Pass through, No HDL, and Cascade Implementations
Pass-through and No HDL Implementations
Implementation | Description |
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Pass-through implementations | Provides a pass-through implementation in which the block's inputs are passed directly to its outputs. HDL Coder™ supports the following blocks with a pass-through implementation:
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No HDL | The You can also use this implementation as an alternative implementation for subsystems. Logic driving a Output ports of |
For more information related to special-purpose implementations, see External Component Interfaces.
Cascade Architecture Best Practices
HDL Coder supports cascade implementations for the MinMax block. These implementations require multiple clock cycles to process their inputs; therefore, their inputs must be kept unchanged for their entire sample-time period. Generated test benches accomplish this by using a register to drive the inputs.
A recommended design practice, when integrating generated HDL code with other HDL code, is to provide registers at the inputs. While not strictly required, adding registers to the inputs improves timing and avoids problems with data stability for blocks that require multiple clock cycles to process their inputs.