Bounded Variable-Size Signal Basic Operations

This example shows how to generate bounded variable-size signals and illustrates some of the operations using those signals. In this example, you generate variable-size signals using the Selector block and the Switch block. The signals are used in math operations, bus creation, bus selection, matrix concatenation and to implement a discrete filter equation.

Bounded Variable-Size Signal Generation

Bounded variable-size signals are generated in the following components.

The Bounded Variable-Size Signal Generation Using Switch Block component uses a Switch block with a scalar signal and a 3-by-2 nonscalar signal at its input ports. Output of this block is a bounded variable-size signal with the upper bound 3-by-2. The output is decided based on the condition set in the Criteria for passing first input parameter. To allow the propagation of different size signals, in the Block Parameters dialog box, select Signal Attributes > Allow different data input sizes. The output signal is further used in the Bus Creation, Bus Selection, and Matrix Concatenation components.

The Bounded Variable-Size Signal Generation Using Selector Block component uses a Selector block that uses a 3-by-4 and a 1-by-2 nonscalar signal. Output of this block is a bounded variable-size signal with the upper bound 3-by-4. To allow the size selection index to change over time, in the Block Parameters dialog box, for the Index Option, select the Starting and ending indices (port) parameter. Additionally, for this model, Number of input dimensions is set to 2.

Basic Operations Using Bounded Variable-Size Signals

Operations using bounded variable-size signals are represented in the following components.

The Bus Creation, Bus Selection and Matrix Concatenation component uses the signals generated using the Switch block and contains the following blocks for bus creation, bus selection, and matrix concatenation.

• Matrix Concatenate block This block concatenates two bounded variable-size signals with an upper bound of 3-by-2 along dimension 1 (rows). It outputs a 6-by-2 matrix.

• Bus Creator block This block combines two 3-by-2 bounded variable-size signals a and b and outputs a non-virtual bus Data Signal. This non-virtual bus is stored in a Goto block.

• Bus Selector block This block uses the non-virtual bus Data Signal and selects two 3-by-2 bounded variable-size signals using a Bus Selector block.

The Stateflow Chart and Function-Call Subsystem to Implement a Discrete-time FIR Filter Equation component implements a third order causal discrete time finite impulse response (FIR) filter equation inside a function call subsystem named Third order Discrete FIR Filter using Unit Delay and Gain blocks. The filter equation represents a weighted sum that uses most recent input values. This subsystem uses a 3-by-2 bounded variable-size signal as input, and is triggered when it receives a function call signal at the function port. Output event E from the Stateflow® Chart Mode Control Logic indicates any changes in signal size, which triggers (enables) the execution of this subsystem.

To propagate the current signal size and reset the Unit Delay block state to accept the size of the current signal, in the Trigger Block Parameters dialog box inside the function call subsystem, set Propagate sizes of variable-size signals parameter to Only when enabling.

The output Processed Signal is represented using a Scope block.

At different time steps of the simulation, the signal width is logged to the base workspace using the simout2 and simout4 variables.

The Mathematical Operations component shows mathematical operations on the bounded variable size signals you generate using the Selector block. This component uses the following blocks for mathematical operations:

• Complex to Real-Imag block: This block separates the real and imaginary parts of complex input signals.

• Math Function blocks: This block uses the square function to compute the square of the real part of the signal and the log10 function to compute the common (base 10) logarithm value of the imaginary part of the signal.

• Width block: This block computes the width of the input bounded variable-size signal at different time steps of the simulation. This value is logged in the base workspace in the variable selectorVarSigWidth.