Circuitos integrados
Modele circuitos integrados comunes utilizando amplificadores, osciladores, temporizadores y contadores. Genere una única salida lógica combinando funciones booleanas.
Categorías
- Circuitos generales
Circuitos integrados de uso común, como amplificadores, comparadores, temporizadores operacionales
- Lógica
Puertas lógicas para circuitos integrados, como CMOS AND, CMOS OR y CMOS NOT
Ejemplos destacados
Synchronous J-K Flip-Flop
Model a J-K flip-flop from Simscape™ Electrical™ logic components. With the two switches in their default positions, both inputs to the flip-flop are set high so its output state toggles each time the clock signal goes low. Initial conditions are passed to the relevant NAND gates via the initialization commands of the block mask.
Digital Potentiometer Parameterized from Datasheet
How to model a digital potentiometer such as is used to control audio amplifiers from a digital circuit or microprocessor-controlled system. The model also shows how you can create your own custom blocks in order to extend the Simscape™ Electrical™ library.
Model Operational Amplifier with Noise
Incorporate noise into an electrical simulation. The circuit models an amplifier with a high-frequency roll off frequency of 10MHz. The Band-Limited Op-Amp block adds the noise. The Voltage Source block, Vn, specifies an equivalent voltage noise density of 20 nV/Hz^0.5. You can also add the thermal noise from the resistors R1 and R2 by setting the Noise mode parameter of the two Resistor blocks to Enabled. However, running this model with different combinations of noise sources shows that the main source of noise is the equivalent noise voltage.
Phase-Locked Loop
How to model a phase-locked loop. The charge pump and filter are modeled using discrete analog components whereas the oscillator is represented as behavioral component using the Simscape™ Electrical™ Voltage-Controlled Oscillator block. The D-type flip-flops in the phase detector are represented in a simplified form using Simulink® blocks to define the behavior, and electrical components are used just at the interface. Non-zero initial conditions are applied to C1 and C2 in order to start the VCO out of phase and test the tracking ability.
Controlar motores de CC con fuente de tensión PWM y controlador de puente H
Este ejemplo muestra cómo controlar un motor de CC utilizando los bloques Controlled PWM Voltage y H-Bridge. El bloque DC Motor proporciona una potencia mecánica de 10 W a 2.500 rpm y gira a una velocidad sin carga de 4.000 rpm cuando la tensión de alimentación de CC es 12 V. En consecuencia, si establece la tensión de referencia PWM en su valor máximo de 5 V, el motor funciona a 4.000 rpm. Si establece la tensión de referencia PWM en 2,5 V, el motor funciona a aproximadamente 2.000 rpm. Para lograr una simulación rápida, este ejemplo establece el parámetro Simulation mode de los bloques Controlled PWM Voltage y H-Bridge en Averaged. Para validar el comportamiento promediado, establezca el parámetro Simulation mode en PWM en los bloques Controlled PWM Voltage y H-Bridge.
Low-Pass Filter Using Operational Transconductance Amplifiers
Model a second-order active low-pass filter. The filter is characterized by the transfer function H(s) = 1 / ( (s/w1)^2 + (1/Q)*(s/w1) + 1 ) where w1 = 2*pi*f1, f1 is the cut-off frequency and Q is the quality factor. Double-click on the Set Design Parameters block to set parameters f1 and Q. The block mask calls a function which sets the parameter values in the model workspace.
Clocked Set-Dominant SR-Latch
Model a Set-dominant SR-Latch from Simscape™ Electrical™ logic components. Initial conditions are passed to the relevant AND gates via the initialization commands of the switches.
Clocked Reset-Dominant SR-Latch
Model a Reset-dominant SR-Latch from Simscape™ Electrical™ logic components. Initial conditions are passed to the relevant AND gates via the initialization commands of the switches.
