Utilize the HDL Verifier™ FPGA-in-the-loop capability to simulate your design running on an FPGA development board within a MATLAB® or Simulink® test environment. This allows you to test your design running on real hardware using the same stimulus and analysis that you used to design your algorithm.
In R2016a, the ability to connect to supported boards via PCI Express® was added to speed interconnect communication.
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