MATLAB and Simulink Seminars

Wireless System Design using FPGAs Faculty Development Program by MathWorks and SAC ISRO


Overview

The rapid expansion of wireless communication technologies from 5G/6G networks to advanced IoT and edge‑processing systems, demands engineers who can translate communication algorithms into efficient real‑time hardware. FPGAs, combined with the high‑level design capabilities of MATLAB and Simulink, offer a powerful platform for developing, testing, and deploying wireless systems with exceptional flexibility and performance.

MathWorks and SAC ISRO would like to invite Faculty members for a 3‑day in-person Faculty Development Program (FDP) that provides participants with an end‑to‑end workflow for wireless system design using MATLAB and Simulink, and FPGA implementation tools. Through technical sessions, hands‑on labs, and expert talks, attendees will explore wireless algorithms, hardware‑centric modelling, HDL code generation, and real‑time verification using industry‑standard design practices.

Registration is Free. However, seats are limited, participants who register are required to attend all 3-days. We encourage you to make the most of this opportunity.

So why wait? Register now and secure your spot!

Highlights

  • End-to-end workflow for designing wireless systems using MATLAB and Simulink-to-end workflow for designing wireless systems using MATLAB and Simulink
  • Modeling and simulation of modulation, filtering, OFDM, and channel effects
  • Handson sessions on fixed-point conversion, hardware optimization, and HDL code generation  on sessions on fixed point conversion, hardware optimization, and HDL code generation
  • FPGA-in-the-loop (FIL) and hardware accelerated verification techniques  in the loop (FIL) and hardware accelerated verification techniques
  • Exposure to Wireless HDL Toolbox and DSP HDL Toolbox for high-performance prototyping  performance prototyping
  • Talks and technical sessions from experts in wireless systems and HDL design
  • Practical demonstration of deploying a wireless transceiver chain on FPGA hardware
  • Joint e-Certificate {MathWorks and SAC ISRO} on completion of the 3-day FDP

Who Should Attend

Educators who teach courses related to Wireless Communication and FPGAs, eager to adopt MATLAB and Simulink across UG and PG courses, focused on identifying industry-aligned and collaborative research opportunities, and aligning faculty-led projects with practical engineering workflows.

About the Experts

  • Dr. Deepak Mishra, Head & Sci/Eng -G, Satnav Payload Electronics Division, SAC(ISRO), Ahmedabad
  • Mr Chandan Pramanik, Director-Education, MathWorks
  • Dr. Praful Pai, Academic Discipline Manager, MathWorks
  • Dr. Anand Mukhopadhyay, Senior Engineer, Education, MathWorks 

Agenda

Session

Day 1: Course Orientation and Foundations of Wireless Communication Day 2: Modulation Techniques & Performance Analysis Day 3: Advanced Modulation (OFDM) & Error Correction
Morning Session I
(9:30-11am)

Inaugural Keynote

Overview of MathWorks and SAC ISRO Collaboration

Speaker – Mr Chandan Pramanik

Accelerating Wireless Simulations

  • using Parallel Computing
  • using MATLAB Coder

[Speaker: Dr. Praful Pai]

Principles of OFDM and Implementation

Hands-on:
Design OFDM transmitter/receiver in Simulink.

[Speaker: Dr. Praful Pai]

 

Overview of the Workflow of Wireless System Development / ISRO Case Study – Navigation and System Level Design

[Speaker: Dr. Deepak Mishra]

  BREAK (15 min) BREAK (15 min) BREAK (15 min)
Morning Session II
(11:15am – 12:45pm)

Refresher - Wireless System Design

Hands on:

  • MATLAB for Digital Modulation
  • Simulink for Digital Modulation
  • BER Analysis
  • SDRs for Wireless
  • Overview of FPGA/SoCs for Wireless Communications

[Speaker: Dr. Praful Pai]

Modulation Schemes

Hands on:

  • Theory and Implementation of QAM, APSK.
  • Implement 16-QAM and 64-QAM in MATLAB/Simulink.

[Speaker: Dr. Praful Pai]


Forward Error Correction

Hands-on:

[Speakers: Dr. Praful Pai and Dr. Anand Mukhopadhyay]

  LUNCH LUNCH LUNCH
Afternoon Session I
(2pm -3:30pm)
Discussion on Course Rollout (15 min) Discussion on Course Rollout (15 min) Discussion on Course Rollout (15 min)

Modulation Schemes

  • Implementation of BPSK, QPSK, ASK, FSK
    BER performance analysis across modulation schemes
    Overview of FPGA/SoCs for Wireless Communications

[Speaker: Dr. Praful Pai]

Modulation Schemes

  • HDL Code Generation for Communication application (Modulation/Demodulation)

[Speaker: Dr. Anand Mukhopadhyay]

Accelerating Wireless Simulations

[Speaker: Dr. Anand Mukhopadhyay]

  BREAK (15 min) BREAK (15 min) BREAK (15 min)
Afternoon Session II
(3:45-5:00pm)

Introduction to HDL Code Generation for Wireless Communications

Hands on:

  • MATLAB/Simulink for HDL
  • Verifying Development Environment
  • Hands-on - HDL Code Generation with MATLAB

[Speaker: Dr. Anand Mukhopadhyay]

CONTINUED…

[Speaker: Dr. Anand Mukhopadhyay]

CONTINUED…

[Speaker: Dr. Anand Mukhopadhyay]

Product Focus

ISRO SAC Logo

Registration closed

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