Kishore Karnane, Cadence
With several leading-edge industry drivers such as IOT, driverless cars, drones, medical devices, augmented reality, artificial intelligence, and the like, there is a constant push on the IC product development teams, which are comprised of multiple disciplines such as digital design, analog and mixed-signal design, pre-silicon verification, post-silicon validation, IC-package-board co-design, board design, and manufacturing test. This constant pressure is to innovate, improve cycle times, improve quality, and reduce silicon excursions. Automation that supports structured workflows for a wide variety of design styles helps improve multiple metrics in the IC product development process. Proposed in this presentation is a flow that leverages products from MathWorks and Cadence to help IC development teams start thinking at a high level of abstraction as they start thinking about exploring their design space using Simulink®. This is followed by an implementation in the Cadence® environment using Virtuoso®. Once the IC design is implemented, a behavioral model of the design in PSpice® could then be brought back into the Simulink environment, where the system around the IC could be explored and designed. In this context, the system could be an application board or a test board. This type of analysis could help us better understand the behavior of the IC in the context of the system for which it was designed for.
Recorded: 5 Nov 2018
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