Generate SystemVerilog DPI for Analog Mixed-Signal Verification - MATLAB & Simulink
Video Player is loading.
Current Time 0:00
Duration 22:56
Loaded: 0.72%
Stream Type LIVE
Remaining Time 22:56
 
1x
  • Chapters
  • descriptions off, selected
  • captions off, selected
  • en (Main), selected
    Video length is 3:50

    Generate SystemVerilog DPI for Analog Mixed-Signal Verification

    Learn how to increase the productivity of IC/ASIC verification processes by exporting MATLAB® and Simulink® models into verification environments.

    Using HDL Verifier™ with Simulink Coder™ or Embedded Coder®, you can export a Simulink subsystem as a SystemVerilog DPI component for behavioral simulation in digital or analog/mixed-signal simulators from Cadence®, Synopsys®, and Mentor Graphics®. You can model and export algorithms, components, environment models, and data sources using this method.

    In this webinar, we show how to:

    • Prepare mixed-signal models for SystemVerilog DPI component generation
    • Generate a SystemVerilog DPI component from your Simulink model
    • Import and simulate an equivalent behavioral SystemVerilog DPI component for analog/mixed-signal simulation using Cadence Virtuoso® AMS Designer

    Recorded: 8 Jul 2019

    View more related videos